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MC145426L PDF预览

MC145426L

更新时间: 2024-11-04 13:11:15
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摩托罗拉 - MOTOROLA /
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20页 264K
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MC145426L 数据手册

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Order this document  
by MC145422/D  
SEMICONDUCTOR TECHNICAL DATA  
The MC145422 and MC145426 UDLTs are high–speed data transceivers  
that provide 80 kbps full–duplex data communication over 26 AWG and larger  
twisted–pair cable up to two kilometers in distance. Intended primarily for use in  
digital subscriber voice/data telephone systems, these devices can also be  
used in remote data acquisition and control systems. These devices utilize a  
256 kilobaud modified differential phase shift keying burst modulation technique  
for transmission to minimize RFI/ EMI and crosstalk. Simultaneous power  
distribution and duplex data communication can be obtained using a single  
twisted–pair wire.  
These devices are designed for compatibility with existing, as well as  
evolving, telephone switching hardware and software architectures.  
The UDLT chip–set consists of the MC145422 Master UDLT for use at the  
telephone switch linecard and the MC145426 Slave UDLT for use at the remote  
digital telset and/or data terminal.  
P SUFFIX  
PLASTIC DIP  
CASE 708  
22  
1
DW SUFFIX  
SOG PACKAGE  
CASE 751E  
24  
1
ORDERING INFORMATION  
MC145422P  
MC145426P  
Plastic DIP  
Plastic DIP  
The devices employ CMOS technology in order to take advantage of their  
reliable low–power operation and proven capability for complex analog/digital  
LSI functions.  
MC145422DW SOG Package  
MC145426DW SOG Package  
Provides Full–Duplex Synchronous 64 kpbs Voice/Data Channel and Two  
8 kbps Signaling Data Channels Over One 26 AWG Wire Pair Up to Two  
Kilometers  
Compatible with Existing and Evolving Telephone Switch Architectures and  
Call Signaling Schemes  
Automatic Detection Threshold Adjustment for Optimum Performance Over  
Varying Signal Attenuations  
Protocol Independent  
Single 5 V Power Supply  
22–Pin PDIP, 24–Pin SOG Packages  
Application Notes AN943, AN949, AN968, AN946, and AN948  
MC145422 Master UDLT  
Pin Controlled Power–Down and Loopback Features  
Signaling and Control I/O Capable of Sharing Common Bus Wiring with  
Other UDLTs  
Variable Data Clock — 64 kHz to 2.56 MHz  
Pin Controlled Insertion/Extraction of 8 kbps Channel into LSB of 64 kbps  
Channel for Simultaneous Routing of Voice and Data Through PCM Voice  
Path of Telephone Switch  
MC145426 Slave UDLT  
Compatible with MC145500 Series PCM Codec–Filters  
Pin Controlled Loopback Feature  
Automatic Power–Up/Power–Down Feature  
On–Chip Data Clock Recovery and Generation  
Pin Controlled 500 Hz D3 or CCITT Format PCM Tone Generator for  
Audible Feedback Applications  
REV 2  
9/95  
Motorola, Inc. 1995  

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