Datasheet > MC145423DT

MC145423DT

更新时间： 2024-11-04 03:58:43

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		电信集成电路光电二极管
页数	文件大小	规格书
30页	797K
描述
Universal Digital Loop Transceiver (UDLT-3)

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MC145423DT 数据手册

Freescale Semiconductor, Inc.

MC145423

Errata

Universal Digital Loop Transceiver (UDLT-3)

Pin Selectable Master/Slave

Limited Distance Modem

This errata applies only to the following:

• Preproduction silicon marked “XCSAMPLE”.

• When setup to operate in UDLT1 mode triangle wave output.

Do to differences in device geometries and process, the LO1 and LO2 output impedance of the MC145423 is

higher during non-burst time than the MC145422 and MC145426 devices it replaces. To compensate for this

difference, the line interface requires a slight modification to optimize transmission performance.

The following partial schematic highlights these differences by placing the modifications inside dashed boxes.

These changes are:

• R19 changes from 110 Ω to 75 Ω.

• R21 changes from 110 Ω to 75 Ω.

• R23 is an added component with a value of 1400 Ω.

For all other device configurations, the original interface as found in the datasheet (page 25, BASIC DIGITAL

TELSET) can be used.

75 Ω D1

LO1

R19

1400 Ω

R23

75 Ω D3

110 Ω

See Note

LO2

R22

R21

Twisted

Pair

Battery

1 µF

See Note

REF

NOTE: Battery feed limiting resistors;

value up to user discretion.

For More Information On This Product,

Go to: www.freescale.com

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