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MC14516BDR2 PDF预览

MC14516BDR2

更新时间： 2024-10-31 22:36:35
品牌 Logo 应用领域
安森美 - ONSEMI 计数器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
12页 223K
描述
Binary Up/Down Counter

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中文翻译

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MC14516BDR2 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-16
针数：16Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.47
Is Samacsys：N计数方向：BIDIRECTIONAL
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e0长度：9.9 mm
负载/预设输入：YES逻辑集成电路类型：BINARY COUNTER
工作模式：SYNCHRONOUS湿度敏感等级：1
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：240
电源：5/15 V传播延迟（tpd）：630 ns
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Counters最大供电电压 (Vsup)：18 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
触发器类型：POSITIVE EDGE宽度：3.9 mm
最小 fmax：4 MHzBase Number Matches：1

MC14516BDR2 数据手册

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The MC14516B synchronous up/down binary counter is  
constructed with MOS P–channel and N–channel enhancement mode  
devices in a monolithic structure.  
This counter can be preset by applying the desired value, in binary,  
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset  
Enable (PE) high. The direction of counting is controlled by applying  
a high (for up counting) or a low (for down counting) to the  
UP/DOWN input. The state of the counter changes on the positive  
transition of the clock input.  
Cascading can be accomplished by connecting the Carry Out to the  
Carry In of the next stage while clocking each counter in parallel. The  
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high  
to the reset (R) pin.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14516BCP  
AWLYYWW  
1
This CMOS counter finds primary use in up/down and difference  
counting. Other applications include: (1) Frequency synthesizer  
applications where low power dissipation and/or high noise immunity  
is desired, (2) Analog–to–digital and digital–to–analog conversions,  
and (3) Magnitude and sign generation.  
16  
SOIC–16  
D SUFFIX  
CASE 751B  
14516B  
AWLYWW  
1
• Diode Protection on All Inputs  
16  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
• Internally Synchronous for High Speed  
• Logic Edge–Clocked Design — Count Occurs on Positive Going  
Edge of Clock  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14516B  
AWLYWW  
1
• Single Pin Reset  
• Asynchronous Preset Enable Operation  
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
• Capable of Driving Two Low–Power TTL Loads or One Low–Power  
Schottky Load Over the Rated Temperature Range  
ORDERING INFORMATION  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
Symbol  
Parameter  
Value  
Unit  
V
MC14516BCP  
MC14516BD  
2000/Box  
48/Rail  
V
DD  
DC Supply Voltage Range  
–0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
–0.5 to V + 0.5  
V
DD  
MC14516BDR2  
SOIC–16 2500/Tape & Reel  
I , I  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
in out  
MC14516BF  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
MC14516BFEL  
P
D
Power Dissipation,  
500  
mW  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
per Package (Note 3.)  
T
Ambient Temperature Range  
Storage Temperature Range  
–55 to +125  
–65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
This device contains protection circuitry to guard  
against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid ap-  
plications of any voltage higher than maximum rated  
voltages to this high–impedance circuit. For proper  
T
Lead Temperature  
(8–Second Soldering)  
L
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
operation, V and V should be constrained to the  
in  
out  
range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Unused inputs must always be tied to an appropriate  
logicvoltagelevel(e.g., eitherV orV ). Unusedout-  
SS  
DD  
puts must be left open.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14516B/D  
1234567...12

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