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MC14517 PDF预览

MC14517

更新时间: 2024-02-15 08:32:28
品牌 Logo 应用领域
安森美 - ONSEMI 移位寄存器
页数 文件大小 规格书
8页 161K
描述
Dual 64-Bit Static Shift Register

MC14517 技术参数

是否无铅:不含铅生命周期:Active
零件包装代码:SOIC包装说明:SOP, SOP16,.4
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.01Is Samacsys:N
其他特性:16-BIT, 32-BIT AND 48-BIT OUTPUT ALSO AVAILABLE计数方向:RIGHT
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.3 mm
逻辑集成电路类型:SERIAL IN SERIAL OUT最大频率@ Nom-Sup:1500000 Hz
湿度敏感等级:3位数:64
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5/15 V传播延迟(tpd):770 ns
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Shift Registers最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
触发器类型:POSITIVE EDGE宽度:7.5 mm
最小 fmax:5.3 MHzBase Number Matches:1

MC14517 数据手册

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The MC14517B dual 64–bit static shift register consists of two  
identical, independent, 64–bit registers. Each register has separate clock  
and write enable inputs, as well as outputs at bits 16, 32, 48, and 64. Data  
at the data input is entered by clocking, regardless of the state of the write  
enable input. An output is disabled (open circuited) when the write enable  
input is high. During this time, data appearing at the data input as well as  
the 16–bit, 32–bit, and 48–bit taps may be entered into the device by  
application of a clock pulse. This feature permits the register to be loaded  
with 64 bits in 16 clock periods, and also permits bus logic to be used.  
This device is useful in time delay circuits, temporary memory storage  
circuits, and other serial shift register applications.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
PDIP–16  
P SUFFIX  
CASE 648  
MC14517BCP  
AWLYYWW  
1
Diode Protection on All Inputs  
Fully Static Operation  
16  
Output Transitions Occur on the Rising Edge of the Clock Pulse  
Exceedingly Slow Input Transition Rates May Be Applied to the  
Clock Input  
14517B  
SOIC–16  
DW SUFFIX  
CASE 751G  
AWLYYWW  
3–State Output at 64th–Bit Allows Use in Bus Logic Applications  
Shift Registers of any Length may be Fully Loaded with 16 Clock  
Pulses  
1
A
= Assembly Location  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 1.)  
SS  
Symbol  
Parameter  
Value  
Unit  
V
ORDERING INFORMATION  
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
MC14517BCP  
MC14517BDW  
2000/Box  
47/Rail  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
MC14517BDWR2  
SOIC–16 1000/Tape & Reel  
P
D
Power Dissipation,  
500  
mW  
per Package (Note 2.)  
T
Operating Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
T
Lead Temperature  
L
(8–Second Soldering)  
1. Maximum Ratings are those values beyond which damage to the device  
may occur.  
2. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
DD  
.
SS  
in  
out  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14517B/D  

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