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MC145173

更新时间： 2024-09-26 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器
页数 文件大小 规格书
33页 281K
描述
Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter

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MC145173 数据手册

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Order this document  
by MC145173/D  
SEMICONDUCTOR TECHNICAL DATA  
Advance Information  
DW SUFFIX  
SOG PACKAGE  
CASE 751E  
24  
1
CMOS  
ORDERING INFORMATION  
MC145173DW SOG Package  
The MC145173 is a single–chip CMOS synthesizer with a four–wire serial  
interface for primary use in AM–FM broadcast receivers. The device also finds  
use in long–wave (LW) and short–wave (SW) receivers. Two inputs to a single  
high–speed N counter are provided, along with 2 phase detectors; one for a  
VHF loop up to 130 MHz, and another for an HF loop up to 40 MHz. The VHF  
phase detector has a current source/sink output and both detectors feature  
linear transfer functions (no dead zones). An external crystal ties across  
on–chip circuitry which drives a completely–programmable reference counter.  
Thus, a broad range of tuning resolution is possible. The crystal oscillator is  
buffered and fed to an open–drain output which is active in the HF mode only.  
Due to the patented BitGrabber registers, address or steering bits are not  
needed in the serial data stream for random access of the registers. The serial  
port is byte–oriented to facilitate control via an MCU. Tuning across a band is  
accomplished with a two–byte transfer to the N register.  
The 6–bit analog–to–digital converter (ADC) has two input channels. The  
converter is read via a one–byte transfer which includes an end–of–conversion  
(EOC) bit.  
A 22–stage frequency counter is provided and accepts two IF (intermediate  
frequency) signals. Primary use for the frequency counter is for the seek or  
scan function on broadcast radio receivers. A proper frequency count ensures  
tuning of valid stations on their center frequencies. Reading the count is  
accomplished with a three–byte serial transfer which includes a count–com-  
plete (CC) bit.  
PIN ASSIGNMENT  
OSC  
in  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
OSC  
out  
ENB  
REF  
out  
D
OUTPUT D  
in  
CLK  
VHF PD  
out  
D
out  
Rx  
INPUT D  
V
SS  
HF PD  
INPUT C  
INPUT B  
out  
V
DD  
INPUT A  
HF  
9
16  
15  
14  
13  
in  
VHF  
HF IF  
in  
10  
11  
12  
in  
VHF IF  
in  
OUTPUT C  
OUTPUT B  
OUTPUT A  
Four general purpose digital outputs are included. One of the outputs is  
open–drain; the others are totem–pole (push–pull). Two general purpose digital  
inputs are provided also. One input has a comparator with a switch point at 33%  
of V  
.
DD  
•
•
Operating Voltage Range: 4.5 to 5.5 V  
Maximum Operating Frequency: VHF = 130 MHz @ 210 mV p–p  
HF = 40 MHz @ 210 mV p–p  
in  
Maximum Frequency of Reference Counter: 15 MHz  
Maximum Frequency of Frequency Counter: 20 MHz  
Maximum Supply Current: Operating Mode = 12 mA  
Standby Mode = 30 µA  
in  
•
•
•
•
•
•
•
•
Approximate ADC Conversion Time: 360 µs  
Operating Temperature Range: – 40 to + 85°C  
R Counter Division Range: 1 and 5 to 16,383  
N Counter Division Range: 40 to 32,767  
Accommodates Downconversion or Upconversion Receiver Design  
for AM Broadcast Band  
•
•
Direct Interface to Motorola SPI Data Port  
Programmer’s Guide Included in Datasheet  
BitGrabber is a trademark of Motorola, Inc.  
This document contains information on a new product. Specifications and information herein are subject to change without notice.  
REV 1  
3/95  
Motorola, Inc. 1995  
1234567...33

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 		Dual-Band PLL Frequency Synthesizer with ADC and Frequency Counter
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MC14517BCP ONSEMI

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 		Dual 64-Bit Static Shift Register
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