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MC14050BFR1 PDF预览

MC14050BFR1

更新时间: 2024-11-14 15:42:31
品牌 Logo 应用领域
安森美 - ONSEMI 输入元件光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 201K
描述
4000/14000/40000 SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO16, EIAJ, PLASTIC, SOIC-16

MC14050BFR1 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:EIAJ, PLASTIC, SOIC-16
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.19
Is Samacsys:N系列:4000/14000/40000
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:10.2 mm负载电容(CL):50 pF
逻辑集成电路类型:BUFFER最大I(ol):0.006 A
功能数量:6输入次数:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/15 VProp。Delay @ Nom-Sup:140 ns
传播延迟(tpd):140 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:2.05 mm
子类别:Gates最大供电电压 (Vsup):18 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5.275 mmBase Number Matches:1

MC14050BFR1 数据手册

 浏览型号MC14050BFR1的Datasheet PDF文件第2页浏览型号MC14050BFR1的Datasheet PDF文件第3页浏览型号MC14050BFR1的Datasheet PDF文件第4页浏览型号MC14050BFR1的Datasheet PDF文件第5页浏览型号MC14050BFR1的Datasheet PDF文件第6页浏览型号MC14050BFR1的Datasheet PDF文件第7页 
The MC14049B Hex Inverter/Buffer and MC14050B Noninverting  
Hex Buffer are constructed with MOS P–Channel and N–Channel  
enhancement mode devices in a single monolithic structure. These  
complementary MOS devices find primary use where low power  
dissipation and/or high noise immunity is desired. These devices  
http://onsemi.com  
provide logic level conversion using only one supply voltage, V  
.
DD  
The input–signal high level (V ) can exceed the V  
voltage for logic level conversions. Two TTL/DTL loads can be driven  
when the devices are used as a CMOS–to–TTL/DTL converter (V  
supply  
MARKING  
DIAGRAMS  
IH  
DD  
16  
DD  
PDIP–16  
P SUFFIX  
CASE 648  
= 5.0 V, V  
0.4 V, I 3.2 mA).  
OL  
OL  
MC140XXBCP  
AWLYYWW  
Note that pins 13 and 16 are not connected internally on these  
devices; consequently connections to these terminals will not affect  
circuit operation.  
1
16  
SOIC–16  
D SUFFIX  
CASE 751B  
High Source and Sink Currents  
High–to–Low Level Converter  
Supply Voltage Range = 3.0 V to 18 V  
V can exceed V  
Meets JEDEC B Specifications  
Improved ESD Protection On All Inputs  
140XXB  
AWLYWW  
1
16  
IN  
DD  
TSSOP–16  
DT SUFFIX  
CASE 948F  
14  
0XXB  
ALYW  
1
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
SS  
16  
1
Symbol  
Parameter  
Value  
Unit  
V
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC140XXB  
AWLYWW  
V
DC Supply Voltage Range  
0.5 to +18.0  
0.5 to +18.0  
DD  
V
Input Voltage Range  
(DC or Transient)  
V
in  
XX  
A
= Specific Device Code  
= Assembly Location  
V
out  
Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
I
Input Current  
(DC or Transient) per Pin  
±10  
±45  
mA  
mA  
mW  
in  
I
Output Current  
ORDERING INFORMATION  
out  
(DC or Transient) per Pin  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
P
D
Power Dissipation,  
per Package (Note 3.)  
(Plastic)  
MC14049BCP  
MC14049BD  
2000/Box  
2400/Box  
825  
740  
(SOIC)  
MC14049BDR2  
SOIC–16 2500/Tape & Reel  
T
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
T
stg  
MC14049BF  
MC14050BCP  
MC14050BD  
SOEIAJ–16  
PDIP–16  
See Note 1.  
2000/Box  
2400/Box  
T
Lead Temperature  
(8–Second Soldering)  
L
SOIC–16  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating: See Figure 3.  
MC14050BDR2  
MC14050BDTEL  
MC14050BF  
SOIC–16 2500/Tape & Reel  
TSSOP–16 2000/Tape & Reel  
This device contains protection circuitry to protect the inputs against damage  
due to high static voltages or electric fields referenced to the V pin only. Extra  
precautions must be taken to avoid applications of any voltage higher than the  
maximumratedvoltagestothishigh–impedancecircuit.Forproperoperation,the  
ranges V V 18 V and V V V are recommended.  
SS  
SOEIAJ–16  
SOEIAJ–16  
See Note 1.  
See Note 1.  
MC14050BFEL  
SS  
in  
SS  
out  
DD  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14049B/D  

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