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MC14040B PDF预览

MC14040B

更新时间: 2024-11-11 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 计数器
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8页 219K
描述
12-Bit Binary Counter

MC14040B 数据手册

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The MC14040B 12–stage binary counter is constructed with MOS  
P–channel and N–channel enhancement mode devices in a single  
monolithic structure. This part is designed with an input wave shaping  
circuit and 12 stages of ripple–carry binary counter. The device  
advances the count on the negative–going edge of the clock pulse.  
Applications include time delay circuits, counter controls, and  
frequency–driving circuits.  
http://onsemi.com  
MARKING  
DIAGRAMS  
16  
Fully Static Operation  
Diode Protection on All Inputs  
Supply Voltage Range = 3.0 Vdc to 18 Vdc  
Capable of Driving Two Low–power TTL Loads or One Low–power  
Schottky TTL Load Over the Rated Temperature Range  
Common Reset Line  
PDIP–16  
P SUFFIX  
CASE 648  
MC14040BCP  
AWLYYWW  
1
16  
Pin–for–Pin Replacement for CD4040B  
SOIC–16  
D SUFFIX  
CASE 751B  
14040B  
AWLYWW  
1
MAXIMUM RATINGS (Voltages Referenced to V ) (Note 2.)  
16  
SS  
Symbol  
Parameter  
Value  
Unit  
V
TSSOP–16  
DT SUFFIX  
CASE 948F  
14  
040B  
ALYW  
V
DD  
DC Supply Voltage Range  
0.5 to +18.0  
V , V  
in out  
Input or Output Voltage Range  
(DC or Transient)  
0.5 to V + 0.5  
V
DD  
1
16  
1
I , I  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
in out  
SOEIAJ–16  
F SUFFIX  
CASE 966  
MC14040B  
AWLYWW  
P
D
Power Dissipation,  
per Package (Note 3.)  
500  
mW  
T
A
Ambient Temperature Range  
Storage Temperature Range  
55 to +125  
65 to +150  
260  
°C  
°C  
°C  
A
= Assembly Location  
T
stg  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
T
L
Lead Temperature  
(8–Second Soldering)  
2. Maximum Ratings are those values beyond which damage to the device  
may occur.  
3. Temperature Derating:  
ORDERING INFORMATION  
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C  
Device  
Package  
PDIP–16  
SOIC–16  
Shipping  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
MC14040BCP  
MC14040BD  
2000/Box  
2400/Box  
high–impedancecircuit. For proper operation, V and V should be constrained  
in  
out  
to the range V  
(V or V  
)
V
.
SS  
in  
out  
DD  
MC14040BDR2  
SOIC–16 2500/Tape & Reel  
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,  
either V or V ). Unused outputs must be left open.  
SS  
DD  
MC14040BDT  
MC14040BF  
TSSOP–16  
SOEIAJ–16  
SOEIAJ–16  
96/Rail  
See Note 1.  
See Note 1.  
MC14040BFEL  
1. For ordering information on the EIAJ version of  
the SOIC packages, please contact your local  
ON Semiconductor representative.  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 3  
MC14040B/D  

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