MC14000UBD

更新时间： 2024-11-03 22:08:27

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		栅
页数	文件大小	规格书
5页	191K
描述
Dual 3-Input NOR Gate Plus Inverter

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中文翻译

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数据手册

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MC14000UBD 数据手册

SEMICONDUCTOR TECHNICAL DATA

L SUFFIX

CERAMIC

CASE 632

The MC14000UB dual 3–input NOR gate plus inverter is constructed with

MOS P–channel and N–channel enhancement mode devices in a single

monolithic structure. These complementary MOS logic gates find primary

use where low power dissipation and/or high noise immunity is desired.

P SUFFIX

PLASTIC

CASE 646

•

Diode Protection on All Inputs

Supply Voltage Range = 3.0 Vdc to 18 Vdc

Logic Swing Independent of Fanout

Pin–for–Pin Replacement for CD4000UB

D SUFFIX

SOIC

CASE 751A

MAXIMUM RATINGS* (Voltages Referenced to V

)

Symbol

Parameter

DC Supply Voltage

Value

Unit

ORDERING INFORMATION

– 0.5 to + 18.0

MC14XXXUBCP

MC14XXXUBCL

MC14XXXUBD

Plastic

Ceramic

SOIC

V , V

in out

Input or Output Voltage (DC or Transient)

– 0.5 to V

+ 0.5

l , l

in out

Input or Output Current (DC or Transient),

per Pin

± 10

= – 55° to 125°C for all packages.

Power Dissipation, per Package†

Storage Temperature

500

stg

– 65 to + 150

260

LOGIC DIAGRAM

Lead Temperature (8–Second Soldering)

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C

CIRCUIT SCHEMATIC

14 11 12 13

= PIN 14

= PIN 7

PIN ASSIGNMENT

IN 3

IN 2

IN 1

IN 2

IN 3

OUT

IN 1

NC = NO CONNECTION

REV 3

1/94

Motorola, Inc. 1995

MC14000UB

MOTOROLA CMOS LOGIC DATA

12 3 4 5

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