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MC10H606 PDF预览

MC10H606

更新时间: 2024-11-18 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
5页 94K
描述
Registered Hex TTL/PECL Translator

MC10H606 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10/100H606 is a 6–bit, registered, single supply TTL to PECL  
translator. The device features differential PECL outputs as well as a choice  
between either a differential PECL clock input or a TTL clock input. The  
asynchronous master reset control is a PECL level input.  
With its differential PECL outputs and TTL inputs the H606 device is  
ideally suited for the transmit function of a HPPI bus type board–to–board  
interface application. The on chip registers simplify the task of synchronizing  
the data between the two boards.  
The device is available in either ECL standard: the MECL 10H device is  
compatible with MECL 10KH logic levels, with a V  
of +5 volts; while the  
CC  
100H device is compatible with 100K logic levels, with a V  
FN SUFFIX  
PLASTIC PACKAGE  
CASE 776–02  
of +5 volts.  
CC  
Differential 50ECL Outputs  
Choice Between Differential PECL or TTL Clock Input  
Single Power Supply  
Multiple Power and Ground Pins to Minimize Noise  
PIN NAMES  
PIN  
FUNCTION  
TTL Data Inputs  
Differential PECL Clock Input  
TTL Clock Input  
D0–D5  
CLK, CLK  
TCLK  
LOGIC SYMBOL  
1 OF 6 BITS  
MR  
Q0–Q5  
Q0–Q5  
PECL Master Reset Input  
True PECL Outputs  
Inverted PECL Outputs  
V
PECL V  
TTL V  
TTL/PECL Ground  
(+5.0V)  
Q
Q
CCE  
CC  
(+5.0V)  
CC  
n
n
D
D
V
CCT  
n
Q
GND  
TRUTH TABLE  
Dn  
MR  
TCLK/CLK  
Qn+1  
CLK  
L
H
X
L
L
H
Z
Z
X
L
H
L
R
Z = LOW to HIGH Transition  
CLK  
CLK  
TCLK  
Pinout: 28–Lead PLCC (Top View)  
*
D1 D2  
V
D3 D4 D5 V  
CCT CCE  
25  
24  
23  
22  
21  
20  
19  
26  
27  
28  
18  
Q5  
D0  
MR  
17  
16  
TCLK  
Q5  
Q4  
Q4  
V
V
V
BB  
BB  
CLK  
CLK  
MR  
15  
14  
13  
12  
2
3
4
CCE  
1. When using PECL inputs, TCLK must be tied to ground (0V).  
2. When using only one PECL input, the unused PECL input must be tied  
*
Q3  
Q3  
to V , and TCLK must be tied to ground (0V).  
BB  
V
3. When using TCLK, both PECL inputs must be tied to ground (0V).  
CCE  
5
6
7
8
9
10  
11  
Q0 Q0 GND Q1 Q1 Q2 Q2  
MECL 10H is a trademark of Motorola, Inc.  
9/96  
REV 1  
Motorola, Inc. 1996  

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