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MC10H121LDS PDF预览

MC10H121LDS

更新时间: 2024-11-26 13:11:15
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摩托罗拉 - MOTOROLA
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3页 98K
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MC10H121LDS 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H121 is a basic logic building block providing the simultaneous  
OR–AND/OR–AND–Invert function, useful in data control and digital  
multiplexing applications. This MECL 10H part is a functional/pinout duplication  
of the standard MECL 10K family part, with 100% improvement in propagation  
delay, and no increase in power– supply current.  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
Propagation Delay, 1.0 ns Typical  
Power Dissipation 100 mW/Gate Typical (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
Voltage Compensated  
MECL 10K–Compatible  
FN SUFFIX  
PLCC  
CASE 775–02  
MAXIMUM RATINGS  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
LOGIC DIAGRAM  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
4
5
6
7
9
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
Output CurrentContinuous  
— Surge  
I
out  
50  
100  
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature RangePlastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
2
3
10  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
11  
12  
13  
14  
15  
Characteristic  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
E
29  
26  
29  
mA  
Input Current High  
Pins 3, 4, 5, 6, 7, 9  
11, 12, 13, 14, 15  
Pin 10  
I
µA  
inH  
500  
610  
295  
360  
295  
360  
V
V
V
= PIN 1  
= PIN 16  
= PIN 8  
CC1  
CC2  
EE  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
I
0.5  
0.5  
0.3  
µA  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc  
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
OH  
V
OL  
DIP  
PIN ASSIGNMENT  
V
IH  
V
IL  
V
A
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
AC PARAMETERS  
A4  
A4  
A4  
A3  
Propagation Delay  
Pin 10 Only  
Exclude Pin 10  
t
ns  
IN  
IN  
IN  
IN  
OUT  
OUT  
pd  
0.45  
0.55  
1.8  
1.95  
0.45  
0.6  
1.8  
2.0  
0.55  
0.7  
2.2  
2.4  
A
Rise Time  
Fall Time  
NOTE:  
t
r
0.5  
0.5  
1.7  
1.7  
0.5  
0.5  
1.8  
1.8  
0.5  
0.5  
1.9  
1.9  
ns  
ns  
A1  
A1  
A1  
A2  
V
IN  
IN  
IN  
IN  
t
f
A3  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Iinear fpm is maintained. Outputs are terminated through  
a 50–ohm resistor to –2.0 volts.  
IN  
A2 , A3  
IN  
IN  
A2I  
N
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  

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