MC10H123
Triple 4−3−3−Input Bus
Driver
Description
The MC10H123 is a triple 4−3−3−Input Bus Driver.
The MC10H123 consists of three NOR gates designed for bus
driving applications on card or between cards. Output low logic levels
http://onsemi.com
MARKING DIAGRAMS*
are specified with V = −2.1 Vdc so that the bus may be terminated to
OL
−2.0 Vdc. The gate output, when low, appears as a high impedance to
the bus, because the output emitter−followers of the MC10H123 are
“turned−off.” This eliminates discontinuities in the characteristic
impedance of the bus.
16
MC10H123L
AWLYYWW
The V level is specified when driving a 25 W load terminated to
OH
−2.0 Vdc, the equivalent of a 50 W bus terminated at both ends.
Although 25 W is the lowest characteristic impedance that can be
driven by the MC10H123, higher impedance values may be used with
this part. A typical 50 W bus is shown in Figure 3.
1
CDIP−16
L SUFFIX
CASE 620A
Features
• Propagation Delay, 1.5 ns Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
16
1
MC10H123P
AWLYYWWG
16
• Voltage Compensated
1
• MECL 10K™ Compatible
PDIP−16
P SUFFIX
CASE 648
• Pb−Free Packages are Available*
1 20
10H123G
AWLYYWW
20
1
PLLC−20
FN SUFFIX
CASE 775
A
= Assembly Location
= Year
WL, L = Wafer Lot
YY, Y
WW, W = Work Week
G
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
February, 2006 − Rev. 7
MC10H123/D