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MC10H123

更新时间： 2024-11-25 22:58:11
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器
页数 文件大小 规格书
4页 104K
描述
Triple 4-3-3-Input Bus Driver

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MC10H123 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
The MC10H123 is a triple 4–3–3–Input Bus Driver.  
The MC10H123 consists of three NOR gates designed for bus driving  
applications on card or between cards. Output low logic levels are specified with  
L SUFFIX  
CERAMIC PACKAGE  
CASE 620–10  
V
= –2.1 Vdc so that the bus may be terminated to –2.0 Vdc. The gate output,  
OL  
when low, appears as a high impedance to the bus, because the output  
emitter–followers of the MC10H123 are “turned–off.” This eliminates  
discontinuities in the characteristic impedance of the bus.  
P SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
The V  
level is specified when driving a 25–ohm load terminated to –2.0  
OH  
Vdc, the equivalent of a 50–ohm bus terminated at both ends. Although 25  
ohms is the lowest characteristic impedance that can be driven by the  
MC10H123, higher impedance values may be used with this part. A typical  
50–ohm bus is shown in Figure 1.  
FN SUFFIX  
PLCC  
CASE 775–02  
•
•
Propagation Delay, 1.5 ns Typical  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
LOGIC DIAGRAM  
•
•
Voltage Compensated  
MECL 10K–Compatible  
4
5
3
MAXIMUM RATINGS  
6
7
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
CC  
9
10  
11  
Input Voltage (V  
= 0)  
V
I
0 to V  
CC  
EE  
2
Output Current— Continuous  
— Surge  
I
out  
50  
100  
V
V
V
= PIN 1  
= PIN 16  
CC1  
CC2  
EE  
Operating Temperature Range  
T
A
0 to +75  
°C  
Storage Temperature Range— Plastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
= PIN 8  
12  
13  
14  
15  
ELECTRICAL CHARACTERISTICS (V  
0°  
= –5.2 V ±5%) (See Note)  
EE  
25°  
75°  
Characteristic  
Power Supply Current  
Input Current High  
Input Current Low  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
Symbol Min  
Max  
60  
Min  
—
Max  
56  
Min  
—
Max  
60  
Unit  
I
—
—
mA  
µA  
µA  
E
DIP  
PIN ASSIGNMENT  
I
495  
—
—
310  
—
—
310  
—
inH  
I
0.5  
0.5  
0.3  
inL  
V
–1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc  
–2.1 –2.03 –2.1 –2.03 –2.1 –2.03 Vdc  
OH  
V
V
CC2  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC1  
V
OL  
C
C
C
C
B
OUT  
IN  
OUT  
OUT  
V
–1.17 –0.84 –1.13 –0.81 –1.07 –0.735 Vdc  
–1.95 –1.48 –1.95 –1.48 –1.95 –1.45 Vdc  
IH  
A
V
IL  
AC PARAMETERS  
Propagation Delay  
Rise Time  
A
IN  
IN  
t
0.7  
0.7  
0.7  
1.5  
1.6  
1.6  
0.7  
0.7  
0.7  
1.6  
1.7  
1.7  
0.7  
0.7  
0.7  
1.7  
1.8  
1.8  
ns  
ns  
ns  
pd  
A
IN  
IN  
t
r
B
A
IN  
IN  
IN  
IN  
Fall Time  
t
f
B
B
A
NOTE:  
IN  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
afterthermalequilibriumhasbeenestablished.Thecircuitisinatestsocketormountedonaprintedcircuit  
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a  
50–ohm resistor to –2.1 volts.  
V
EE  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
3/93  
Motorola, Inc. 1996  
REV 5  
1234

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