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MC10H116FNR2G PDF预览

MC10H116FNR2G

更新时间: 2024-11-06 05:10:23
品牌 Logo 应用领域
安森美 - ONSEMI /
页数 文件大小 规格书
6页 163K
描述
Triple Line Receiver

MC10H116FNR2G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:QLCC包装说明:LEAD FREE, PLASTIC, LCC-20
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:4 weeks风险等级:1.66
差分输出:YES输入特性:DIFFERENTIAL
接口集成电路类型:LINE RECEIVER接口标准:GENERAL PURPOSE
JESD-30 代码:S-PQCC-J20JESD-609代码:e3
长度:8.965 mm湿度敏感等级:3
标称负供电电压:-5.2 V功能数量:3
端子数量:20最高工作温度:75 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):260电源:-5.2 V
认证状态:Not Qualified最大接收延迟:1.3 ns
接收器位数:3座面最大高度:4.57 mm
子类别:Line Driver or Receivers最大压摆率:23 mA
表面贴装:YES技术:ECL
温度等级:COMMERCIAL EXTENDED端子面层:Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:8.965 mmBase Number Matches:1

MC10H116FNR2G 数据手册

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MC10H116  
Triple Line Receiver  
Description  
The MC10H116 is a triple differential amplifier designed for use in  
sensing differential signals over long lines and is a functional/pinout  
duplication of the MC10116, with 100% improvement in propagation  
delay and no increase in power supply current. For termination  
information see AND8020.  
http://onsemi.com  
MARKING DIAGRAMS*  
Features  
Propagation Delay, 1.0 ns Typical  
Power Dissipation 85 mW Typ/Pkg (same as MECL 10K)  
Improved Noise Margin 150 mV (Over Operating Voltage and  
Temperature Range)  
16  
1
16  
MC10H116L  
AWLYYWW  
1
CDIP16  
L SUFFIX  
Voltage Compensated  
CASE 620A  
MECL 10K Compatible  
PbFree Packages are Available*  
16  
1
MC10H116P  
AWLYYWWG  
4
5
2
3
*V to be used to supply bias to the MC10H116 only and bypassed  
BB  
16  
(when used) with 0.01 mF to 0.1 mF capacitor to ground (0 V). V can  
BB  
source < 1.0 mA.  
1
The MC10H116 is designed to be used in sensing differential signals  
9
6
7
PDIP16  
P SUFFIX  
CASE 648  
over long lines. The bias supply (V ) is made available to make the  
BB  
10  
device useful as a Schmitt trigger, or in other applications where a  
stable reference voltage is necessary.  
12  
13  
14  
Active current sources provide these receivers with excellent  
commonmode noise rejection. If any amplifier in a package is not  
used, one input of that amplifier must be connected to V to prevent  
15  
11  
1 20  
BB  
unbalancing the currentsource bias network.  
The MC10H116 does not have internalinput pulldown resistors.  
This provides high impedance to the amplifier input and facilitates  
differential connections.  
V
*
BB  
V
V
V
= Pin 1  
= Pin 16  
= Pin 8  
CC1  
20  
1
CC2  
10H116G  
AWLYYWW  
Applications:  
EE  
Low Level Receiver  
Voltage Level  
Interface  
PLCC20  
FN SUFFIX  
CASE 775  
When input pin with  
bubble goes positive  
it’s respective output  
pin with bubble goes  
positive.  
Schmitt Trigger  
16  
Figure 1. Logic Diagram  
16  
10H116G  
AWLYWW  
1
SO16  
D SUFFIX  
CASE 751B  
1
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
V
CC2  
CC1  
OUT  
OUT  
16  
A
A
C
C
C
C
OUT  
OUT  
IN  
16  
10H116  
ALYWG  
1
A
A
IN  
IN  
SOEIAJ16  
M, MEL SUFFIX  
CASE 966  
IN  
B
B
V
B
B
OUT  
OUT  
BB  
IN  
1
A
= Assembly Location  
= Wafer Lot  
V
IN  
EE  
WL  
YY  
WW  
= Year  
Pin assignment is for DualinLine Package.  
For PLCC pin assignment, see TND309, the Pin Conversion Tables,  
page 9.  
= Work Week  
*For additional marking information, refer to  
Application Note AND8002/D.  
Figure 2. Dip Pin Assignment  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 Rev. 10  
MC10H116/D  

MC10H116FNR2G 替代型号

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