Datasheet > MC10EL15DR2G

MC10EL15DR2G

更新时间： 2024-11-24 05:10:27

品牌	Logo	应用领域
安森美 - ONSEMI		时钟
页数	文件大小	规格书
8页	147K
描述
5V ECL 1:4 Clock Distribution Chip

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MC10EL15DR2G 数据手册

MC10EL15, MC100EL15

5VꢀECL 1:4 Clock

Distribution Chip

The MC10EL/100EL15 is a low skew 1:4 clock distribution chip

designed explicitly for low skew clock distribution applications. The

pin, an internally generated voltage supply, is available to this device

http://onsemi.com

only. For single-ended input conditions, the unused differential input is

connected to V as a switching reference voltage. V may also rebias

AC coupled inputs. When used, decouple V and V via a 0.01 mF

capacitor and limit current sourcing or sinking to 0.5 mA. When not used,

should be left open.

The EL15 features a multiplexed clock input to allow for the

distribution of a lower speed scan or test clock along with the high

speed system clock. When LOW (or left open and pulled LOW by the

input pulldown resistor) the SEL pin will select the differential clock

input.

SO−16

D SUFFIX

CASE 751B

The common enable (EN) is synchronous so that the outputs will

only be enabled/disabled when they are already in the LOW state. This

avoids any chance of generating a runt clock pulse when the device is

enabled/disabled as can happen with an asynchronous control. The

internal flip flop is clocked on the falling edge of the input clock,

therefore all associated specification limits are referenced to the

negative edge of the clock input.

MARKING DIAGRAMS*

10EL15G

100EL15G

AWLYWW

The 100 series contains temperature compensation.

Features

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

• 50 ps Output-to-Output Skew

• Synchronous Enable/Disable

• Multiplexed Clock Input

• PECL Mode Operating Range: V = 4.2 V to 5.7 V

*For additional marking information, refer to

Application Note AND8002/D.

with V = 0 V

• NECL Mode Operating Range: V = 0 V

with V = −4.2 V to −5.7 V

• Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and EN.

• Pb−Free Packages are Available*

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2005

Publication Order Number:

August, 2005 − Rev. 5

MC10EL15/D

12 3 4 5 6 7 8

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MC10EL15DR2G 替代型号

型号	品牌	替代类型	描述	数据表
CDCLVP111VF	TI	功能相似	LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
MC100LVEL14DWR2G	ONSEMI	功能相似	3.3V ECL 1:5 Clock Distribution Chip
NB2305AI1DR2G	ONSEMI	功能相似	3.3 V Zero Delay Clock Buffer

与MC10EL15DR2G相关器件

型号	品牌	获取价格	描述	数据表
MC10EL16	ONSEMI	获取价格	Differential Receiver
MC10EL16_06	ONSEMI	获取价格	5.0 V ECL Differential Receiver
MC10EL16D	MOTOROLA	获取价格	Differential Receiver
MC10EL16D	ONSEMI	获取价格	Differential Receiver
MC10EL16DG	ONSEMI	获取价格	5.0 V ECL Differential Receiver
MC10EL16DR2	ONSEMI	获取价格	Differential Receiver
MC10EL16DR2G	ONSEMI	获取价格	5.0 V ECL Differential Receiver
MC10EL16DT	ONSEMI	获取价格	Differential Receiver
MC10EL16DTG	ONSEMI	获取价格	5.0 V ECL Differential Receiver
MC10EL16DTR2	ONSEMI	获取价格	Differential Receiver

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