MC100H604FNG

更新时间： 2024-11-09 13:11:15

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
4页	88K
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数据手册

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MC100H604FNG 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL

translator. The device features differential ECL outputs as well as a choice

between either a differential ECL clock input or a TTL clock input. The

asynchronous master reset control is an ECL level input..

With its differential ECL outputs and TTL inputs the H604 device is ideally

suited for the transmit function of a HPPI bus type board–to–board interface

application. The on chip registers simplify the task of synchronizing the data

between the two boards.

The device is available in either ECL standard: the 10H device is

compatible with MECL 10KH logic levels while the 100H device is

compatible with 100K logic levels.

FN SUFFIX

PLASTIC PACKAGE

CASE 776–02

•

Differential 50Ω ECL Outputs

Choice Between Differential ECL or TTL Clock Input

Dual Power Supply

Multiple Power and Ground Pins to Minimize Noise

Specified Within–Device Skew

PIN NAMES

FUNCTION

TTL Data Inputs

Differential ECL Clock Input

TTL Clock Input

ECL Master Reset Input

True ECL Outputs

Inverted ECL Outputs

D0–D5

CLK, CLK

TCLK

Q0–Q5

LOGIC SYMBOL

1 OF 6 BITS

CCE

CCT

ECL V

TTL V

ECL V

(0V)

(+5.0V)

(–5.2V)

TRUTH TABLE

TCLK/CLK

Qn+1

CLK

Z = LOW to HIGH Transition

CLK

TCLK

Pinout: 28–Lead PLCC (Top View)

D1 D2

D3 D4 D5 V

CCT CCE

TCLK

CLK

CCE

1. When using MECL inputs, TCLK must be tied to ground (0V).

2. When using only one MECL input, the unused MECL input must be tied

CCE

to V , and TCLK must be tied to ground (0V).

3. When using TCLK, both MECL inputs must be tied to V

(–5.2V).

Q0 Q0

Q1 Q1 Q2 Q2

9/96

REV 1

2–302

Motorola, Inc. 1996

12 3 4

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