Datasheet > MC100EL14_06

MC100EL14_06

更新时间： 2024-02-29 08:26:13

品牌	Logo	应用领域
安森美 - ONSEMI		时钟
页数	文件大小	规格书
8页	123K
描述
5V ECL 1:5 Clock Distribution Chip

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MC100EL14_06 数据手册

MC100EL14

5V ECL 1:5 Clock

Distribution Chip

The MC100EL14 is a low skew 1:5 clock distribution chip designed

explicitly for low skew clock distribution applications. The V pin, an

internally generated voltage supply, is available to this device only.

For single-ended input conditions, the unused differential input is

http://onsemi.com

connected to V as a switching reference voltage. V may also

rebias AC coupled inputs. When used, decouple V and V via a

0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.

When not used, V should be left open.

The EL14 features a multiplexed clock input to allow for the

distribution of a lower speed scan or test clock along with the high speed

system clock. When LOW (or left open and pulled LOW by the input

pulldown resistor) the SEL pin will select the differential clock input.

The common enable (EN) is synchronous so that the outputs will only

be enabled/disabled when they are already in the LOW state. This

avoids any chance of generating a runt clock pulse when the device is

enabled/disabled as can happen with an asynchronous control. The

internal flip flop is clocked on the falling edge of the input clock,

therefore all associated specification limits are referenced to the

negative edge of the clock input.

SOIC−20L

DW SUFFIX

CASE 751D

MARKING DIAGRAM

Features

• 50 ps Output-to-Output Skew

• Synchronous Enable/Disable

• Multiplexed Clock Input

100EL14

AWLYYWWG

• The 100 Series Contains Temperature Compensation

• PECL Mode Operating Range: V = 4.2 V to 5.7 V

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Package

with V = 0 V

• NECL Mode Operating Range: V = 0 V

with V = −4.2 V to −5.7 V

• Q Output will Default LOW with Inputs Open or at V

• Internal Input Pull−down Resistors on All Inputs, Pull−up Resistors

*For additional marking information, refer to

Application Note AND8002/D.

on Inverted Inputs

• Pb−Free Packages are Available*

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

Publication Order Number:

October, 2006 − Rev. 7

MC100EL14/D

12 3 4 5 6 7 8

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与MC100EL14_06相关器件

型号	品牌	获取价格	描述	数据表
MC100EL14DW	ONSEMI	获取价格	1:5 Clock Distribution Chip
MC100EL14DW	MOTOROLA	获取价格	1:5 Clock Distribution Chip
MC100EL14DWG	ONSEMI	获取价格	5V ECL 1:5 Clock Distribution Chip
MC100EL14DWR2	ONSEMI	获取价格	5V ECL 1:5 Clock Distribution Chip
MC100EL14DWR2G	ONSEMI	获取价格	5V ECL 1:5 Clock Distribution Chip
MC100EL15	ONSEMI	获取价格	1:4 Clock Distribution Chip
MC100EL15D	MOTOROLA	获取价格	1:4 Clock Distribution Chip
MC100EL15D	ONSEMI	获取价格	5V ECL 1:4 Clock Distribution Chip
MC100EL15DG	ONSEMI	获取价格	5V ECL 1:4 Clock Distribution Chip
MC100EL15DR2	ONSEMI	获取价格	5V ECL 1:4 Clock Distribution Chip

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