Datasheet > MC-22212361F9-E85X-CD5

MC-22212361F9-E85X-CD5

更新时间： 2024-01-29 16:52:00

品牌	Logo	应用领域
瑞萨 - RENESAS		静态存储器内存集成电路
页数	文件大小	规格书
28页	385K
描述
MC-22212361F9-E85X-CD5

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MC-22212361F9-E85X-CD5 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

MC-22212361F9-E85X-CD5 数据手册

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MC-22212361-X

• Hardware reset and standby using /RESET pin

• Automatic sleep mode

• Boot block sector protect by /WP (ACC) pin

• Extra One Time Protect Sector provided

• Program / erase time

• Program : 11.0 µs / word (TYP.)

• Sector erase :

Program / erase cycle : 100,000 cycles

0.15 s (TYP.) (4K words sector), 0.5 s (TYP.) (32K words sector)

Program / erase cycle : 300,000 cycles

0.5 s (TYP.) (4K words sector), 0.7 s (TYP.) (32K words sector)

• Program / erase cycle : 300,000 cycles (MIN.)

SRAM Features

• Memory organization : 262,144 words × 16 bits

• Supply current : At operating : 30 mA (MAX.)

At standby : 6 µA (MAX.)

• Two Chip Enable inputs : /CE1s, CE2s

• Byte data control : /LB, /UB

• Low V^CCdata retention : 1.5 V (MIN.)

Ordering Information

Part number

Flash Memory

SRAM

Operating supply voltage

Package

Mounted

Access time Access time

Flash Memory

ns (MAX.)

Chip

I/O

MC-22212361F9-D80X-CD5

1.8 to 2.1

(Flash

2.7 to 3.1

(Flash

85-pin

µPD29F064115-X

TAPE FBGA

(11 × 8)

Memory)

2.7 to 3.1

(SRAM)

1.65 to 1.95

(Flash

Memory)

MC-22212361F9-E85X-CD5

Memory)

2.7 to 3.1

(SRAM)

Bus Operations, COMMANDS, HARDWARE SEQUENCE FLAGS, HARD WARE DATA PROTECTION, READ

MODE REGISTER SETTINGS, TIMING CHARTS and FLOW CHARTS for Flash Memory, refer to PAGE MODE

FLASH MEMORY, BURST MODE FLASH MEMORY Information (M15451E).

TIMING CHARTS OF SRAM FOR MCP, refer to SRAM AND MOBILE SPECIFIED RAM TIMING CHARTS FOR

MCP Information (M15819E).

Preliminary Data Sheet M15855EJ3V0DS

123 4 5 6 7...28

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