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MBM29F200TC PDF预览

MBM29F200TC

更新时间: 2024-11-03 22:58:07
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
48页 490K
描述
2M (256K X 8/128K X 16) BIT

MBM29F200TC 数据手册

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FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20867-3E  
FLASH MEMORY  
CMOS  
2M (256K × 8/128K × 16) BIT  
MBM29F200TC-55/-70/-90/MBM29F200BC-55/-70/-90  
FEATURES  
• Single 5.0 V read, write, and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)  
44-pin SOP (Package suffix: PF)  
• Minimum 100,000 write/erase cycles  
• High performance  
55 ns maximum access time  
• Sector erase architecture  
One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes.  
Any combination of sectors can be concurrently erased. Also supports full chip erase.  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded ProgramTM Algorithms  
Automatically writes and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready/Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
• Low Vcc write inhibit 3.2 V  
• Erase Suspend/Resume  
Suspends the erase operation to allow a read in another sector within the same device  
• Hardware RESET pin  
Resets internal state machine to the read mode  
• Sector protection  
Hardware method disables any combination of sectors from write or erase operations  
• Temporary sector unprotection  
Hardware method temporarily enables any combination of sectors from write on erase operations.  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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