Product Flyer
Mixed Signal Division
October 2004
Version 1.1
MB86064
FME/MS/DAC80/FL/5085
Dual 14-bit 1GSa/s DAC
The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog
converter (DAC), delivering exceptional dynamic performance.
Each high performance DAC core is capable of generating
multi-standard, multi-carrier communication transmit signals,
suitable for 2, 2.5 and 3G systems. DAC data is input via two
high-speed LVDS ports. These operate in a pseudo double data
rate (DDR) mode, with data latched on both rising and falling
edges. Alternatively, the device can be configured as a
multiplexed dual-port single DAC. To simplify system
integration the DAC operates from a clock running at half the
DAC conversion rate.
PLASTIC PACKAGE
EFBGA-120
Package Dimensions
12 mm x 12 mm
Features
• Dual 14-bit, 1GSa/s Digital to Analog conversion
• Exceptional dynamic performance
PIN ASSIGNMENT
• 74dBc ACLR for 4 UMTS carriers @ 276MHz direct-IF
• 100MHz image-free generated bandwidth capability
• supports UMTS plus digital pre-distortion bandwidth
• Proprietary performance enhancement features
• LVDS data interface
AC19
AA19
AC17
AA17
AC15
AA15
AC13
AA13
AC11
AA11
AC9
AA9
AC7
AA7
AC5
AA5
AB18
Y18
AB16
Y16
AB14
Y14
AB12
Y12
AB10
Y10
AB8
Y8
AB6
Y6
• Register selectable on-chip LVDS termination resistors
• Fujitsu 4-wire serial control interface
W23
U23
R23
N23
L23
J23
W21
U21
R21
N21
L21
J21
G21
E21
W3
U3
W1
U1
X_A9
A9
X_A10
A10
X_B10
B10
X_B9
B9
V4
T4
P4
V2
T2
P2
M2
K2
H2
F2
V22
T22
P22
V20
T20
P20
M20
K20
H20
F20
DVSS
X_B8
B8
DVDD
DVSS
X_A8
A8
DVDD
X_B7
B7
• Two 16k point programmable on-chip waveform memories
• Low power 3.3V analog and 1.8V digital operation
• 750mW per DAC power dissipation at 1GSa/s
• 0.18µm CMOS technology with Triple Well
• Performance enhanced EFBGA package
X_A7
A7
R14
R12
R10
R3
N3
L3
J3
R1
N1
L1
J1
P15
P13
M13
K13
P11
P9
X_B6
B6
X_B5
B5
X_A6
A6
X_A5
A5
N14
L14
J14
N12
L12
J12
N10
L10
J10
M22
M4
K4
H4
M15
M11
M9
DVSS
X_B3
B3
DVSS
X_A3
A3
DVDD
DVDD
X_A4
A4
X_B4
B4
K22
K15
K11
K9
X_A1
X_B1
B1
X_B2
B2
X_A2
A2
H22
F22
A1
All centre pins : TG
G23
E23
G3
E3
G1
E1
DVSS
NC
DVSS
NC
DVDD
DVDD
DVSS
DVDD
DVDD
DVSS
F4
NC
NC
• Industrial temperature range (-40°C to +85°C)
D18
B18
D16
B16
D14
B14
D12
B12
D10
B10
D8
B8
D6
B6
C19
A19
C17
A17
C15
A15
C13
A13
C11
A11
C9
A9
C7
A7
C5
A5
Index
Applications
• Multi-carrier, Multi-standard cellular infrastructure
• CDMA, W-CDMA, GSM/EDGE, UMTS
• Wideband communications systems
• High Direct-IF architectures
Not to scale. Viewed from above.
• Arbitrary waveform generation
• Test equipment
• Radar, video & display systems
Copyright © 2004 Fujitsu Microelectronics Europe GmbH
Production
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.