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MB86065PB-G

更新时间: 2024-11-21 13:00:23
品牌 Logo 应用领域
富士通 - FUJITSU 转换器数模转换器
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2页 196K
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MB86065PB-G 数据手册

 浏览型号MB86065PB-G的Datasheet PDF文件第2页 
The Fujitsu MB86064 and MB86065  
High-Performance Digital to Analog Converters  
Clock Output 1  
(LVDS)  
÷
4-wire Serial  
Control Interface  
Control Interface  
(1.8V LVCMOS)  
1, 2, 4, 8  
÷
Clock Output 2  
(LVDS)  
1, 2, 4, 8  
RF Clock Input  
(½ DAC rate)  
Port A Data Input  
(14-bit LVDS)  
Double-Edge  
clocked  
Waveform  
Memory  
A
DAC A  
(14-bit)  
Analog Output A  
Analog Output B  
Loop-Clock Input  
(LVDS)  
(16k Points)  
Waveform  
Memory  
B
Loop-Clock Output  
(LVDS)  
DAC B  
(14-bit)  
(16k Points)  
Port B Data Input  
(14-bit LVDS)  
(MB86064 only)  
Description  
The MB86064 and MB86065 are part of the Fujitsu  
second generation of high-performance digital to  
analog converters (DACs).  
Both devices feature the markets shortest propagation  
delay combined with superior time-domain response for  
control-based applications that require low latency.  
Robust data interfacing to compatible FPGAs and  
ASICs is assured by a proprietary Loop-Clock  
architecture. This unique solution automatically  
maintains critical clock-to-data timing across variations  
in process, voltage and temperature (PVT). No  
calibration is required during production or lifetime  
operation, reducing total system costs.  
MB86064 Dual 14-bit 1.0GSa/s DAC  
MB86065 Single 14-bit 1.3GSa/s DAC  
The MB86064 is ideally suited to radio applications,  
providing dual transmit or transmit with diversity. The  
MB86065 supports conversion rates up of up to  
1.3GSa/s, which enables higher generating frequencies  
combined with wider spurious-free generating regions.  
Features  
Delivers higher frequency, direct-IF generation  
Supports multiple, including non-contiguous,  
narrow and wide-band signal generation  
Integrated waveform memory for storing test and  
evaluation vectors on-chip  
compared to competitors’alternatives  
Avoids the analog and digital overhead of IQ and  
direct conversion architectures  

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