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MAX3273 PDF预览

MAX3273

更新时间： 2024-01-12 20:01:54
品牌 Logo 应用领域
美信 - MAXIM 驱动器
页数 文件大小 规格书
15页 983K
描述
+3.3V, 2.5Gbps Low-Power Laser Driver

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中文翻译

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MAX3273 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC24,.16SQ,20针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.8
接口集成电路类型：INTERFACE CIRCUITJESD-30 代码：S-XQCC-N24
JESD-609代码：e3长度：4 mm
湿度敏感等级：1功能数量：1
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC24,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified座面最大高度：0.8 mm
子类别：Display Drivers最大供电电压：3.6 V
最小供电电压：3.14 V标称供电电压：3.3 V
表面贴装：YES技术：BIPOLAR
温度等级：INDUSTRIAL端子面层：Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4 mmBase Number Matches：1

MAX3273 数据手册

 浏览型号MAX3273的Datasheet PDF文件第5页浏览型号MAX3273的Datasheet PDF文件第6页浏览型号MAX3273的Datasheet PDF文件第7页浏览型号MAX3273的Datasheet PDF文件第9页浏览型号MAX3273的Datasheet PDF文件第10页浏览型号MAX3273的Datasheet PDF文件第11页 
+3.3V, 2.5Gbps Low-Power Laser Driver  
V
CC  
V
CC  
LATCH  
L
25Ω  
P1  
OUT-  
OUT+  
0
C
D
MUX  
1
R
D
Q
DATA  
CLK  
D
I
MOD  
L
L
P1  
P2  
I
V
CC  
BIAS  
MAX3273  
BIAS  
V
CC  
FAILURE  
DETECTOR  
FAIL  
EN  
TIA  
MD  
I
MD  
I
APCSET  
x160  
BG  
V
500pF  
x190  
MODSET  
BIASMAX  
APCFILT1  
APCFILT2  
APCSET  
R
R
R
APCSET  
MODSET  
BIASMAX  
C
APCFILT  
Figure 3. Functional Diagram  
cient headroom for the proper operation of the laser dri-  
ver if the modulation output is DC-coupled to the laser  
diode. To solve this problem, the MAX3273’s modula-  
tion output is AC-coupled to the cathode of a laser  
diode. An external pullup inductor is necessary to DC-  
Detailed Description  
The MAX3273 laser driver consists of two main parts: a  
high-speed modulation driver and a laser-biasing block  
with automatic power control (APC). The circuit design  
is optimized for both high-speed and low-voltage  
(+3.3V) operation. To minimize the jitter of the input sig-  
nal at speeds as high as 2.7Gbps, the device accepts  
a differential CML clock signal for data retiming. When  
LATCH is high, the input data is synchronized by the  
clock signal. When LATCH is low, the input data is  
directly applied to the output stage.  
bias the modulation output at V . Such a configuration  
CC  
isolates laser-forward voltage from the output circuitry  
and the supply voltage V . A simplified functional dia-  
CC  
gram is shown in Figure 3.  
The MAX3273 modulation output is optimized for dri-  
ving a 25Ω load. Modulation current swings of 75mA  
are possible, but because of minimum power-supply  
and jitter requirements at 2.5Gbps, the specified maxi-  
mum modulation current is limited to 60mA. To inter-  
The output stage is composed of a high-speed differ-  
ential pair and a programmable modulation current  
source. Because the modulation output drives a maxi-  
mum current of 60mA into the laser with an edge speed  
of 59ps, large transient voltage spikes can be generat-  
ed (due to the parasitic inductance of the laser). These  
transients and the laser-forward voltage leave insuffi-  
face with the laser diode, a damping resistor (R ) is  
D
required for impedance matching. An RC-shunt net-  
work might also be necessary to compensate for the  
laser-diode parasitic inductance, thereby improving the  
8
_______________________________________________________________________________________  
1...567891011...15

中文翻译

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