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MAX1126

更新时间: 2024-11-03 22:46:27
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美信 - MAXIM /
页数 文件大小 规格书
25页 790K
描述
Quad, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs

MAX1126 数据手册

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19-3143; Rev 1; 3/04  
Qu a d , 1 2 -Bit , 4 0 Ms p s , 1 .8 V ADC w it h  
S e ria l LVDS Ou t p u t s  
Ge n e ra l De s c rip t io n  
Fe a t u re s  
The MAX1126 quad, 12-bit analog-to-digital converter  
(ADC) fe a ture s fully d iffe re ntia l inp uts , a p ip e line d  
architecture, and digital error correction. This ADC is  
optimized for low-power, high-dynamic performance for  
medical imaging, communications, and instrumentation  
applications. The MAX1126 operates from a 1.7V to  
1.9V single supply and consumes only 563mW while  
delivering a 69.9dB signal-to-noise ratio (SNR) at a  
5.3MHz input frequency. In addition to low operating  
power, the MAX1126 features an 813µA power-down  
mode for idle periods.  
Four ADC Channels with Serial LVDS/SLVS  
Outputs  
Excellent Dynamic Performance  
69.9dB SNR at f = 5.3MHz  
IN  
93.7dBc SFDR at f = 5.3MHz  
IN  
-90dB Channel Isolation  
Ultra-Low Power  
135mW per Channel (Normal Operation)  
1.5mW Total (Shutdown Mode)  
Accepts 20% to 80% Clock Duty Cycle  
Self-Aligning Data-Clock to Data-Output Interface  
Fully Differential Analog Inputs  
An internal 1.24V precision bandgap reference sets the  
ADCs full-scale range. A flexible reference structure  
allows the use of an external reference for applications  
requiring increased accuracy or a different input volt-  
age range.  
Wide 1.4V  
Differential Input Voltage Range  
P-P  
Internal/External Reference Option  
Test Mode for Digital Signal Integrity  
A single-ended clock controls the conversion process.  
An internal duty-cycle equalizer allows for wide varia-  
tions in inp ut-c loc k d uty c yc le . An on-c hip p ha s e -  
loc ke d loop (PLL) g e ne ra te s the hig h-s p e e d s e ria l  
low-voltage differential signaling (LVDS) clock.  
LVDS Outputs Support Up to 30in FR-4 Backplane  
Connections  
Small, 68-Pin QFN with Exposed Paddle  
Evaluation Kit Available (MAX1127EVKIT)  
The MAX1126 provides serial LVDS outputs for data,  
clock, and frame alignment signals. The output data is  
presented in twos complement or binary format.  
Ord e rin g In fo rm a t io n  
PART  
TEMP RANGE  
PIN-PACKAGE  
68 QFN 10mm x  
x 10mm x 0.9mm  
Refer to the MAX1127 data sheet for a pin-compatible  
65Msps version of the MAX1126.  
MAX1126EGK  
-40°C to +85°C  
The MAX1126 is available in a small, 10mm x 10mm x  
0.9mm, 68-pin QFN package with exposed paddle and  
is specified for the extended industrial (-40°C to +85°C)  
temperature range.  
P in Co n fig u ra t io n  
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52  
GND  
IN0P  
IN0N  
GND  
IN1P  
IN1N  
GND  
1
2
51 OUT0P  
50 OUT0N  
Ap p lic a t io n s  
Ultrasound and Medical Imaging  
Positron Emission Tomography (PET) Imaging  
Multichannel Communication Systems  
Instrumentation  
EP  
3
49 OV  
DD  
4
48 OUT1P  
47 OUT1N  
5
6
46 OV  
DD  
7
45 CLKOUTP  
AV  
DD  
8
CLKOUTN  
44  
MAX1126  
AV  
DD  
9
OV  
43  
42  
DD  
AV  
DD  
10  
FRAMEP  
GND 11  
IN2P 12  
IN2N 13  
GND 14  
IN3P 15  
IN3N 16  
GND 17  
41 FRAMEN  
40 OV  
DD  
39 OUT2P  
38 OUT2N  
37 OV  
DD  
36 OUT3P  
35 OUT3N  
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34  
QFN  
10mm x 10mm x 0.9mm  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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