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M76DW62000A70ZT PDF预览

M76DW62000A70ZT

更新时间: 2024-11-03 23:13:15
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储静态存储器
页数 文件大小 规格书
27页 407K
描述
64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 8Mbit/4Mbit SRAM, 3V Supply, Multiple Memory Product

M76DW62000A70ZT 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:LFBGA, BGA73,10X12,32针数:73
Reach Compliance Code:unknownHTS代码:8542.32.00.71
风险等级:5.84最长访问时间:70 ns
其他特性:STATIC RAM IS ORGANIZED AS 512K X 16; FLASH MEMORY IS ALSO ORGANIZED AS 8M X 8JESD-30 代码:R-PBGA-B73
长度:11.6 mm内存密度:67108864 bit
内存集成电路类型:MEMORY CIRCUIT内存宽度:16
混合内存类型:FLASH+SRAM功能数量:1
端子数量:73字数:4194304 words
字数代码:4000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:4MX16封装主体材料:PLASTIC/EPOXY
封装代码:LFBGA封装等效代码:BGA73,10X12,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
电源:3,3/3.3 V认证状态:Not Qualified
座面最大高度:1.4 mm最大待机电流:0.0001 A
子类别:Other Memory ICs最大压摆率:0.02 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM宽度:8 mm
Base Number Matches:1

M76DW62000A70ZT 数据手册

 浏览型号M76DW62000A70ZT的Datasheet PDF文件第2页浏览型号M76DW62000A70ZT的Datasheet PDF文件第3页浏览型号M76DW62000A70ZT的Datasheet PDF文件第4页浏览型号M76DW62000A70ZT的Datasheet PDF文件第5页浏览型号M76DW62000A70ZT的Datasheet PDF文件第6页浏览型号M76DW62000A70ZT的Datasheet PDF文件第7页 
M76DW63000A  
M76DW62000A  
64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and  
8Mbit/4Mbit SRAM, 3V Supply, Multiple Memory Product  
PRELIMINARY DATA  
FEATURES SUMMARY  
MULTIPLE MEMORY PRODUCT  
Figure 1. Package  
– 64 Mbit (8Mb x8 or 4Mb x16), Multiple Bank,  
Page, Boot Block, Flash Memory  
– SRAM: 8Mbit (512K x 16) for  
M76DW63000A, or 4Mbit (256K x 16) for  
M76DW62000A  
SUPPLY VOLTAGE  
FBGA  
– V  
– V  
= V  
= 2.7V to 3.3V  
CCF  
PPF  
CCS  
= 12V for Fast Program (optional)  
ACCESS TIME: 70, 90ns  
LOW POWER CONSUMPTION  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 0020h  
LFBGA73 (ZA)  
8 x 11.6mm  
– Device Code: 227Eh + 2202h + 2201h  
FLASH MEMORY  
ASYNCHRONOUS PAGE READ MODE  
– Page Width: 4 Words  
– Page Access: 25, 30ns  
V /WP PIN for FAST PROGRAM and WRITE  
– Random Access: 70, 90ns  
PROGRAMMING TIME  
– 10µs per Byte/Word typical  
– 4 Words/ 8 Bytes at-a-time Program  
MEMORY BLOCKS  
PP  
PROTECT  
TEMPORARY BLOCK UNPROTECTION  
MODE  
COMMON FLASH INTERFACE  
– 64 bit Security Code  
– Quadruple Bank Memory Array:  
8Mbits + 24Mbits + 24Mbits + 8Mbits  
EXTENDED MEMORY BLOCK  
– Extra block used as security block or to store  
additional information  
– Parameter Blocks (at both Top and Bottom)  
DUAL OPERATIONS  
100,000 PROGRAM/ERASE CYCLES per  
– While Program or Erase in a group of banks  
(from 1 to 3), Read in any of the other banks  
BLOCK  
SRAM  
PROGRAM/ERASE SUSPEND and RESUME  
8Mbit (512K x 16) or 4Mbit (256K x 16)  
MODES  
ACCESS TIME: 70ns  
– Read from any Block during Program  
Suspend  
LOW V  
DATA RETENTION: 1.5V  
CCS  
– Read and Program another Block during  
Erase Suspend  
POWER DOWN FEATURES USING TWO  
CHIP ENABLE INPUTS  
UNLOCK BYPASS PROGRAM COMMAND  
– Faster Production/Batch Programming  
September 2003  
1/27  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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