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M74HC541C1R PDF预览

M74HC541C1R

更新时间: 2024-11-22 22:36:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件
页数 文件大小 规格书
12页 268K
描述
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED

M74HC541C1R 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:QCCJ, LDCC20,.4SQ
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.82
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:HC/UHJESD-30 代码:S-PQCC-J20
JESD-609代码:e3长度:8.9662 mm
负载电容(CL):150 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:21 ns传播延迟(tpd):29 ns
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.9662 mm

M74HC541C1R 数据手册

 浏览型号M74HC541C1R的Datasheet PDF文件第2页浏览型号M74HC541C1R的Datasheet PDF文件第3页浏览型号M74HC541C1R的Datasheet PDF文件第4页浏览型号M74HC541C1R的Datasheet PDF文件第5页浏览型号M74HC541C1R的Datasheet PDF文件第6页浏览型号M74HC541C1R的Datasheet PDF文件第7页 
M54HC540/541  
M74HC540/541  
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS  
HC540: INVERTED - HC541 NON INVERTED  
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HIGH SPEED  
PD = 10 ns (TYP.) at VCC = 5V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at TA = 25 oC  
HIGH NOISE IMMUNITY  
t
V
NIH = VINL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 6 mA (MIN)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
VCC (OPR) = 2V to 6V  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS540/541  
ORDER CODES :  
M54HCXXXF1R  
M74HCXXXB1R  
M74HCXXXM1R  
M74HCXXXC1R  
DESCRIPTION  
The M54/74HC540 and HC541 are high speed  
CMOS OCTAL BUS BUFFERS (3-STATE)  
fabricated in silicon gate C2MOS technology. They  
have the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
The HC540isaninverting buffer andHC541 isa non  
inverting buffer.  
enhance PC board layout, the HC540 and HC541  
offers a pinout having inputs and outputs on  
opposite sides of the package.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
The 3 STATE control gate operates as a two input  
AND such that if either G1 and G2 are high, all eight  
output are in the high impedance state. In order to  
PIN CONNECTION (top view)  
HC540  
HC541  
October 1993  
1/12  

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