Datasheet > M74HC279TTR

M74HC279TTR

更新时间： 2024-11-01 22:22:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
10页	276K
描述
QUAD S - R LATCH

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中文翻译

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数据手册

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M74HC279TTR 数据手册

M74HC279

QUAD S - R LATCH

■

HIGH SPEED:

= 13ns (TYP.) at V = 6V

LOW POWER DISSIPATION:

=2µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 4mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

TUBE

DIP

SOP

M74HC279B1R

M74HC279M1R

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 279

M74HC279RM13TR

M74HC279TTR

TSSOP

DESCRIPTION

The M74HC279 is an high speed CMOS QUAD

S - R LATCH fabricated with silicon gate C MOS

technology.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

August 2001

1/10

12 3 4 5 6 7...10

中文翻译

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