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M74HC238C1R PDF预览

M74HC238C1R

更新时间: 2024-11-01 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器驱动器逻辑集成电路输入元件
页数 文件大小 规格书
10页 249K
描述
3 TO 8 LINE DECODER

M74HC238C1R 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:CC-20
针数:20Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.83Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:HC/UH
JESD-30 代码:S-PQCC-J20JESD-609代码:e3
长度:8.9662 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.004 A
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC20,.4SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
Prop。Delay @ Nom-Sup:38 ns传播延迟(tpd):38 ns
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.9662 mmBase Number Matches:1

M74HC238C1R 数据手册

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M54HC238  
M74HC238  
3 TO 8 LINE DECODER  
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HIGH SPEED  
tPD = 14 ns (TYP.) AT VCC = 5 V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) AT TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V TO 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS238  
ORDER CODES :  
M54HC238F1R  
M74HC238B1R  
M74HC238M1R  
M74HC238C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC238 is a high speed CMOS 3 to 8 line  
decoder fabricated insilicongate C2MOStechnology.  
It has the same high speed performance of LSTTL  
combined with true CMOSlow power consumption. If  
the device is enabled, 3 binary select inputs (A, B and  
C)determine whichoneof outputs willgohigh. Enable  
input G1 is held ”Low” or either G2A or G2B is held  
”High” decoding function is inhibited and all the 8 out-  
putsgo low. Three enable inputs are provided to ease  
cascade connection and application of this address  
decoder in memory systems.  
Allinputs are equipped with protection circuits against  
static discharge and transient excess voltage.  
NC =  
No Internal  
Connection  
October 1993  
1/10  

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