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M74HC240 PDF预览

M74HC240

更新时间: 2024-11-17 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件
页数 文件大小 规格书
12页 272K
描述
HC240: INVERTED - HC241/244 NON INVERTED OCTAL BUS BUFFER WITH 3 STATE OUTPUTS

M74HC240 数据手册

 浏览型号M74HC240的Datasheet PDF文件第2页浏览型号M74HC240的Datasheet PDF文件第3页浏览型号M74HC240的Datasheet PDF文件第4页浏览型号M74HC240的Datasheet PDF文件第5页浏览型号M74HC240的Datasheet PDF文件第6页浏览型号M74HC240的Datasheet PDF文件第7页 
M54HC240/241/244  
M74HC240/241/244  
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS  
HC240: INVERTED - HC241/244 NON INVERTED  
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HIGH SPEED  
PD = 10 ns (TYP.) at VCC = 5V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at TA = 25 oC  
HIGH NOISE IMMUNITY  
t
V
NIH = VINL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 6 mA (MIN)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
VCC (OPR) = 2V to 6V  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS240/241/244  
ORDER CODES :  
M54HCXXXF1R  
M74HCXXXB1R  
M74HCXXXM1R  
M74HCXXXC1R  
DESCRIPTION  
The M54/74HC240, HC241 and HC244 are high  
speed CMOS OCTAL BUS BUFFERs fabricated in  
silicon gate C2MOS technology.  
complementary G and G inputs. Each control input  
governs four BUS BUFFERs.  
These devices are designed to be used with 3 state  
memory address drivers, etc. All inputs are  
equipped with protection circuits against static  
discharge and transient excess voltage.  
They have the same high speed performance of  
LSTTL combined with true CMOS low power  
consumption.  
The designer has a choise of select combination of  
inverting and non-inverting outputs, symmetrical G  
(active low output  
control) input, and  
PIN CONNECTION (top view)  
HC240  
HC241  
HC244  
October 1993  
1/12  

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HC240: INVERTED - HC241/244 NON INVERTED OCTAL BUS BUFFER WITH 3 STATE OUTPUTS
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