M66307FP

更新时间： 2024-02-23 19:50:45

品牌	Logo	应用领域
三菱 - MITSUBISHI		存储内存集成电路光电二极管输入元件
页数	文件大小	规格书
22页	234K
描述
LINE SCAN BUFFER with 16-BIT MPU BUS COMPATIBLE INPUTS

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中文翻译

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技术参数
数据手册

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M66307FP 技术参数

生命周期：	Obsolete	零件包装代码：	DIP
针数：	32	Reach Compliance Code：	compliant
HTS代码：	8542.32.00.71	风险等级：	5.28
Is Samacsys：	N	Base Number Matches：	1

M66307FP 数据手册

MITSUBISHI DIGITAL ASSP

M66307SP/FP

LINE SCAN BUFFER with 16BIT MPU BUS COMPATIBLE INPUTS

LINE SCAN BUFFER with 16-BIT MPU BUS COMPATIBLE INPUTS

DESCRIPTION

PIN CONFIGURATION (TOP VIEW)

The M66307SP/FP is an integrated circuit consisting of a line buffer

with static memory, manufactured by the silicon gate CMOS pro-

cess, which satisfies A3-paper 400DPI requirements. It converts the

stored data from the 16-bit MPU bus into serial data and outputs it at

a transfer rate of up to 10Mbps synchronously with the external data

request clock or an arbitrary continuous clock.

VCC(5V)

D10

D11

D12

D13

D14

D15

DATA INPUTS

FEATURES

16-bit MPU bus compatible

•

Writing data via DMAC is possible

•

WRITE CONTROL

INPUT

320-word (5,120-bit) static RAM

•

DMA ACKNOWLEDGE

CHIP SELECT INPUT

COMMAND/DATA

CONTROL INPUT

DACK

DREQ

INPUT

Data output rate of up to 10Mbps

•

DMA REQUEST

OUTPUT

Built-in function to add fixed data of a specified length at the be-

C/D

•

ginning of output data (Fixed data: Continuous High bit or Low bit

data)

RESET INPUT

EXTENDED D INPUT

TOGGLE INPUT

RESET

EXD

TOG

INTERRUPT REQUEST

OUTPUT

INTR

The output format can be selected between FIFO or LIFO.

CLOCK

•

CLOCK INPUT

CLK/ IN

CLK/ OUT

DATA OUT

OUTPUT

DATA OUTPUT

BUSY/

OUTPUT

READY

The output method can be selected from two:

CLOCK ENABLE

INPUT

CLKE

(1) Synchronized with an arbitrary continuous clock ( IN) on the

(0V)GND

BUSY/ORDY

system side; the frequency of clock output (CLK/ OUT) can

be divided by 1, 2, 4, 8, or 16.

(2) Synchronized with the data request clock (CLK IN) on the pe-

ripheral equipment side.

OUTPUT

Outline 32P4B

32P2W-A

Up to two devices can be cascaded.

(1) Toggle configuration

•

The clock input (CLK/ IN) contains a Schmitt trigger.

•

(2) 32-bit bus configuration

The reset (RESET), Write (WR) and toggle input (TOG) contain

negative noise reduction circuits.

High fan-out outputs (CLK/ OUT, DATA OUT).

Io=±24mA

(±4mA for INTR and DREQ

±8mA for BUSY/ORDY)

APPLICATION

Image-handling general OA equipment

BLOCK DIAGRAM

GND VCC

Write

control

circuit

Output

control

circuit

Write/send

address

control

DREQ

C/D

DACK

circuit

Command registers

Output

control

circuit

INTR

Fixed data

length register

BUSY/ORDY

DREQ words register

Mode register

320 word

CMOS

Output

control

circuit

DATA OUT

D10

D11

D12

D13

D14

D15

SRAM

Expansion

control

circuit

TOG

EXD

Clock

control

circuit

Frequency

divider

CLK/ IN

Output

control

circuit

Clock signal

select circuit

CLKE

CLK/ OUT

Reset

control

circuit

RESET

12 3 4 5 6 7...22

中文翻译

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与M66307FP相关器件

型号	品牌	获取价格	描述	数据表
M66307SP	RENESAS	获取价格	LINE SCAN BUFFER WITH 16-BIT MPU BUS COMPATIBLE INPUTS
M66307SP	MITSUBISHI	获取价格	LINE SCAN BUFFER with 16-BIT MPU BUS COMPATIBLE INPUTS
M66-308	MICRO-ELECTRONICS	获取价格	Tone/Music Synthesizer, PBCY3, TO-92
M66-309	MICRO-ELECTRONICS	获取价格	Tone/Music Synthesizer, PBCY3, TO-92
M66-31	MICRO-ELECTRONICS	获取价格	Tone/Music Synthesizer, PBCY3, TO-92
M66310FP	MITSUBISHI	获取价格	16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
M66310FP	RENESAS	获取价格	16-Bit LED Driver with Shift Register and Latch
M66310P	RENESAS	获取价格	16-Bit LED Driver with Shift Register and Latch
M66310P	MITSUBISHI	获取价格	16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
M66311FP	MITSUBISHI	获取价格	16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH

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