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M66281FP

更新时间： 2024-11-20 22:46:35
品牌 Logo 应用领域
三菱 - MITSUBISHI 存储先进先出芯片
页数 文件大小 规格书
13页 128K
描述
5120 x 8-BIT x 2 LINE MEMORY

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中文翻译

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M66281FP 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：QFP包装说明：QFP, QFP48,.35X.5
针数：48Reach Compliance Code：unknown
ECCN代码：EAR99HTS代码：8542.32.00.71
风险等级：5.67最长访问时间：18 ns
其他特性：5120-WORD X 8-BIT DOUBLE CONFIGURATION周期时间：25 ns
JESD-30 代码：R-PQFP-G48JESD-609代码：e0
长度：10 mm内存密度：81920 bit
内存宽度：8功能数量：1
端子数量：48字数：10240 words
字数代码：10000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：10KX8可输出：NO
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP48,.35X.5封装形状：RECTANGULAR
封装形式：FLATPACK并行/串行：PARALLEL
电源：3.15 V认证状态：Not Qualified
座面最大高度：2.15 mm子类别：Other Memory ICs
最大压摆率：0.15 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.15 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD宽度：7 mm
Base Number Matches：1

M66281FP 数据手册

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MITSUBISHI <DIGITAL ASSP>  
M66281FP  
5120 x 8-BIT x 2 LINE MEMORY  
When write reset input WRESB is set to "L", the write address  
counter of memory only for 1 line delay data is initialized.  
When read enable input REB is set to "L", the contents of memory  
only for 1 line delay data are output to data outputs Q00 to Q07  
and the contents of memory only for 2 line delay data are output to  
Q10 to Q17 in synchronization with a rising edge of read clock  
input RCK to perform reading operation.  
When this is the case, the read address counters of memory only  
for 1 line delay data and memory only for 2 line delay data are  
incremented simultaneously.  
In addition, data of Q00 to Q07 is written into memory only for 2  
line delay data in synchronization with a rising edge of RCK. When  
this is the case, the write address counter of memory only for 2 line  
delay data is then incremented.  
When REB is set to "H", operation for reading data from memory  
only for 1 line delay and from memory only for 2 line delay data is  
inhibited and the read address counter of each memory stops.  
Outputs Q00 to Q07 and Q10 to Q17 are placed in a high  
impedance state. In addition, the write address counter of memory  
only for 2 line delay data then stops.  
DESCRIPTION  
The M66281FP is high speed line memory that uses high  
performance silicon gate CMOS process technology and adopts the  
FIFO (First In First Out) structure consisting of 5120 words x 8 bits  
x 2.  
Since memory is available to simultaneously output 1 line delay and  
2 line delay data, the M66281FP is optimal for the compensation of  
data of multiple lines.  
FEATURES  
• Memory configuration 5120 words x 8 bits x 2 (dynamic memory)  
• High speed cycle  
• High speed access  
• Output hold  
• Reading and writing operations can be completely carried out  
independently and asynchronously.  
• Variable length delay bit  
• Input/output  
• Output  
25 ns (Min.)  
18 ns (Max.)  
3 ns (Min.)  
TTL direct connection allowable  
3 states  
1 line delay  
• Q00 – Q07  
• Q10 – Q17  
When read reset input RRESB is set to "L", the read address  
counters of memory only for 1 line delay data as well as the write  
address counter and read address counter of memory only for 2  
line delay data are then initialized.  
2 line delay  
APPLICATION  
• Digital copying machine  
, laser beam printer, high speed facsimile,  
etc.  
FUNCTION  
When write enable input WEB is set to "L", the contents of data  
inputs D0 to D7 are written into memory only for 1 line delay data in  
synchronization with a rising edge of write clock input WCK to  
perform writing operation. When this is the case, the write address  
counter of memory only for 1 line delay data is incremented  
simultaneously.  
When WEB is set to "H", the writing operation is inhibited and the  
write address counter of memory only for 1 line delay data stops.  
PIN CONFIGURATION (TOP VIEW)  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
NC  
D5  
39  
40  
41  
42  
43  
NC  
RCK  
D6  
RRESB  
REB  
D7  
GND  
VCC  
Q17  
Q16  
Q15  
NC  
GND  
M66281FP  
VCC 44  
Q00  
45  
Q01 46  
47  
48  
Q02  
NC  
Outline 48P6S-A(QFP)  
NC : No connection  
1
1234567...13

中文翻译

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与M66281FP相关器件

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M66-282 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66282FP MITSUBISHI

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 		8192 x 8-BIT LINE MEMORY
M66282FP RENESAS

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 		8192 × 8-Bit Line Memory
M66-283 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66-284 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66-285 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66-286 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66-287 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92
M66287FP MITSUBISHI

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 		262144-word x 8-bit x 3-FIELD MEMORY
M66-288 MICRO-ELECTRONICS

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 		Tone/Music Synthesizer, PBCY3, TO-92

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