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M66238FP PDF预览

M66238FP

更新时间: 2024-11-09 22:46:35
品牌 Logo 应用领域
三菱 - MITSUBISHI 晶体时钟发生器微控制器和处理器外围集成电路光电二极管
页数 文件大小 规格书
11页 104K
描述
STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER

M66238FP 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP32,.45
针数:32Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.5Is Samacsys:N
JESD-30 代码:R-PDSO-G32JESD-609代码:e0
长度:20 mm端子数量:32
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:50 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP32,.45
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:5 V主时钟/晶体标称频率:50 MHz
认证状态:Not Qualified座面最大高度:2.4 mm
子类别:Clock Generators最大压摆率:120 mA
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:8.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

M66238FP 数据手册

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MITSUBISHI DIGITALASSP
M66238FP
STANDARD CLOCK GENERATOR WITH PLL FREQUENCY SYNTHESIZER  
DESCRIPTION  
PIN CONFIGURATION (TOP VIEW)  
The M66238 is a LSI that incorporates a PLL synthesizer and  
a sync clock generator in it. The PLL synthesizer covers the  
range of 25MHz to 50MHz at the minimum steps of 3kHz.  
The sync circuit outputs a clock and a one-shot pulse which  
are synchronized with an external trigger signal. Setting a  
dividing ratio allows acquisition of sync clock outputs within  
the range of 0.78MHz to 25MHz.  
ANALOG GND PIN  
ANALOG POWER  
SUPPLY PIN  
DIGITAL GND PIN  
RESET INPUT  
DGND  
RESET  
CS  
1
2
32  
31  
30  
AGND  
AVCC  
AGND  
CHIP SELECT INPU  
T
ANALOG GND PIN  
3
VCO LOAD OUTPUT  
ANALOG POWER  
SUPPLY PIN  
ANALOG GND PIN  
FILTER CONNECT PIN  
ANALOG GND PIN  
SERIAL DATA INPUT  
SERIAL CLOCK INPUT  
CLOCK OUTPUT  
CLOCK INPUT  
SIN  
4
29 RV  
SCLK  
XOUT  
XIN  
5
28  
27  
26  
25  
24  
23  
22  
AVCC  
FEATURES  
6
AGND  
CPIN  
• Sync clock output frequency range: 1/1, 1/2, 1/4, 1/8, 1/16,  
1/32 of 25 to 50MHz  
• Sync accuracy (jitter): ±3ns  
• Trigger input: Polarity selectable  
• One-shot pulse output: Polarity and width selectable  
• 5V power supply  
7
DIGITAL GND PIN  
DGND  
DVCC  
TCKI  
8
AGND  
DIGITAL POWER  
SUPPLY PIN  
9
CPOUT FILTER CONNECT PIN  
10  
11  
12  
13  
14  
15  
16  
DGND DIGITAL GND PIN  
TEST PIN  
DIGITAL POWER  
DVCC  
TCKO  
CKO/PLLO  
SUPPLY PIN  
PLL OUTPUT  
21 UP  
TEST PIN  
APPLICATION  
Pixel clock generator  
CLOCK OUTPUT  
CKOB  
PULSE  
VCCO  
GNDO  
20 DOWN  
DIGITAL POWER  
DVCC  
SUPPLY PIN  
ONE-SHOT PULSE OUTPUT  
19  
18  
17  
SYNC OUTPUT POWER  
SUPPLY PIN  
SYNC OUTPUT GND PIN  
DGND DIGITAL GND PIN  
TRIGGER INPUT  
TR  
Outline 32P2W-A  
BLOCK DIAGRAM  
COMMAND  
REGISTER  
COMMAND CONTROL  
CIRCUIT  
CHIP SELECT INPUT  
SERIAL DATA INPUT  
CS  
3
4
5
10 TCKI  
SERIAL  
WRITE  
CONTROL  
CIRCUIT  
TEST PIN  
SIN  
11 TCKO  
SERIAL CLOCK INPUT SCLK  
15  
12  
CLOCK INPUT  
XIN  
7
6
CRYSTAL  
OSCILLATOR  
CIRCUIT  
15-BIT COUNTER  
CLOCK OUTPUT XOUT  
fin  
PHASE  
COMPARATOR  
12-BIT  
DIVIDER  
fvco  
VCO  
25MHz ~ 50MHz  
12 CKO/PLLO PLL OUTPUT  
SYNC/DIVIDER  
CIRCUIT  
13 CKOB  
14 PULSE  
CLOCK OUTPUT  
SYNC CLOCK  
(
)
RESET INPUT RESET  
2
CHARGE  
PUMP  
GENERATOR  
ONE-SHOT PULSE OUTPUT  
TRIGGER INPUT  
TR 17  
21  
UP  
20  
24  
26  
29  
DOWN CPOUT  
CPIN  
RV  
TEST PIN  
FILTER CONNECT PIN  
VCO LOAD OUTPUT  
FILTER CONNECT PIN  
1

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