Datasheet > M65608E

M65608E

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
爱特美尔 - ATMEL		静态存储器
页数	文件大小	规格书
15页	337K
描述
Rad. Tolerant 128K x 8 Very Low Power 5V CMOS SRAM

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M65608E 数据手册

M65608E

AC Parameters

AC Test Conditions

Input Pulse Levels:....................................GND to 3.0V

Input Rise/Fall Times: ...............................5 ns

Input Timing Reference Levels: ................1.5V

Output loading IOL/IOH (see Figure 1 and Figure 2)+30 pF

AC Test Loads Waveforms

Figure 1

Figure 2

Figure 3

Data Retention Mode

Atmel CMOS RAM’s are designed with battery backup in mind. Data retention voltage

and supply current are guaranteed over temperature. The following rules ensure data

retention:

1. During data retention chip select CS1 must be held high within VCC to VCC -

0.2V or, chip select CS2 must be held down within GND to GND +0.2V.

2. Output Enable (OE) should be held high to keep the RAM outputs high imped-

ance, minimizing power dissipation.

3. During power up and power-down transitions CS1 and OE must be kept between

VCC + 0.3V and 70% of VCC, or with CS2 between GND and GND -0.3V.

4. The RAM can begin operation > TR ns after VCC reaches the minimum opera-

tion voltages (4.5V).

Timing

4151I–AERO–03/04

1...3 4 567 8 9...15

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型号	品牌	描述	获取价格	数据表
M65608E_07	ATMEL	Rad. Tolerant 128K x 8 5-volts Very Low Power CMOS SRAM	获取价格
M65608E_09	ATMEL	Rad. Tolerant 128Kx8, 5-Volt Very Low Power CMOS SRAM	获取价格
M65609E	ATMEL	Rad. Hard 128K x 8 3.3-volt Very Low Power CMOS SRAM	获取价格
M65609E_07	ATMEL	Rad Hard 128K x 8 3.3-volt Very Low Power CMOS SRAM	获取价格
M65609FP	MITSUBISHI	Consumer Circuit, CMOS, PQFP100, 100P6S	获取价格
M65610ASP	MITSUBISHI	Y/C Separator IC, PDIP42, 0.600 INCH, SHRINK, PLASTIC, DIP-42	获取价格