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M62342HP PDF预览

M62342HP

更新时间: 2024-11-11 05:47:19
品牌 Logo 应用领域
瑞萨 - RENESAS 转换器数模转换器光电二极管
页数 文件大小 规格书
8页 107K
描述
8-Bit, 2-Channel D/A Converter (Buffered)

M62342HP 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:2.80 X 2.90 MM, 0.65 MM PITCH, PLASTIC, SOP-8针数:8
Reach Compliance Code:compliant风险等级:5.77
Is Samacsys:N最大模拟输出电压:5.4 V
最小模拟输出电压:0.1 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL, PARALLEL, 8 BITS
JESD-30 代码:R-PDSO-G8长度:2.9 mm
最大线性误差 (EL):0.5859%位数:8
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSSOP
封装等效代码:SSOP8,.16封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH电源:3/5 V
认证状态:Not Qualified座面最大高度:1.4 mm
最大稳定时间:300 µs子类别:Other Converters
最大压摆率:2.5 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:2.8 mmBase Number Matches:1

M62342HP 数据手册

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M62342HP  
8-Bit, 2-Channel D/A Converter (Buffered)  
REJ03F0271-0100  
Rev.1.00  
Mar 25, 2008  
Description  
The M62342HP is a CMOS-structure semiconductor integrated circuit incorporating two 8-bit D/A converter channels  
with output buffer op-amps.  
Serial data transfer type input can easily be used through a combination of three lines: DI, CLK, and LD.  
Outputs incorporate buffer op-amps that have a drive capacity of 1 mA or above for both sink and source, and can  
operate over the entire voltage range from almost ground to VCC (0 to 5 V), making peripheral elements unnecessary  
and enabling configuration of a system with few component parts.  
This product is currently under development, and specifications and other details may be modified at a future date.  
Features  
Data transfer format  
10-bit serial data input type  
Output buffer op-amps  
Operable over entire voltage range from almost ground to VCC (0 to 5 V)  
High output current capacity  
±1 mA or higher  
Application  
Signal gain setting and automatic adjustment in DSC, CTV, and display monitors, conversion from digital data to  
analog data in consumer and industrial products  
Block Diagram  
VCC  
4
LD  
8
CLK  
7
DI  
6
GND  
5
10-bit shift register  
Power-on  
reset  
Channel  
decoder  
8
8-bit latch  
8-bit latch  
8-bit upper  
segment R-2R  
8-bit upper  
segment R-2R  
+
+ −  
1
2
3
AO1  
AO2  
N.C  
REJ03F0271-0100 Rev.1.00 Mar 25, 2008  
Page 1 of 7  

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