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M62352FP#TF1T PDF预览

M62352FP#TF1T

更新时间: 2024-01-28 14:26:16
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器
页数 文件大小 规格书
10页 118K
描述
IC,D/A CONVERTER,12-CHANNEL,8-BIT,CMOS,SOP,20PIN

M62352FP#TF1T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.84
转换器类型:D/A CONVERTER输入位码:BINARY
JESD-30 代码:R-PDSO-G20最大线性误差 (EL):0.59%
位数:8功能数量:12
端子数量:20最高工作温度:85 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:5 V认证状态:Not Qualified
最大稳定时间:300 µs子类别:Other Converters
最大压摆率:3.5 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

M62352FP#TF1T 数据手册

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Preliminary Datasheet  
M62352P/FP/GP  
8-bit 12ch D/A Converter with Buffer Amplifiers  
Description  
R03DS0041EJ0400  
Rev.4.00  
Jun 03, 2011  
The M62352 is an integrated circuit semiconductor of CMOS structure with 12 channels of built-in D/A converters with  
output buffer operational amplifiers.  
The 3-wire serial interface method is used for the transfer format of digital data to allow connection with  
microcomputer with minimum wiring.  
It is able to cascading serial use with DO terminal.  
The output buffer operational amplifier operates in the whole voltage range from power supply to ground for both  
input/output.  
Features  
12-bit serial data input (3-wire serial data transfer method)  
Highly stable output buffer operational amplifier allow operation in the all voltage range from power supply to  
ground.  
Application  
Adjustment/control of industrial or home-use electronic equipment, such as VTR camera, VTR set, TV, and CRT  
display.  
Block Diagram  
GND  
20  
AO2  
19  
AO1  
18  
DI  
CLK  
16  
LD  
15  
DO  
14  
AO12  
13  
AO11  
12  
VCC  
11  
17  
12-bit shift register  
D0 1  
2
3
4
5
6 D7 D8 9 10 D11  
8-bit R-2R  
+ segment  
D/A converter  
D/A  
L
D/A  
L
D/A  
Address  
decoder  
Ch2  
1
12  
11  
8-bit  
latch  
(8)  
L
L
........  
....  
(12)  
L
(12)  
(12)  
8-bit  
latch  
L
L
L
L
L
Ch3  
4
5
6
7
8
9
10  
8-bit R-2R  
+ segment  
D/A converter  
D/A  
D/A  
D/A  
D/A  
D/A  
D/A  
D/A  
Buffer  
OP AMP  
1
2
3
4
5
6
7
8
9
10  
VSS  
(VrefL)  
AO3  
AO4  
AO5  
AO6  
AO7  
AO8  
AO9  
AO10  
VDD  
(VrefU)  
R03DS0041EJ0400 Rev.4.00  
Jun 03, 2011  
Page 1 of 9  

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