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M62332FP#CF0R PDF预览

M62332FP#CF0R

更新时间: 2024-11-11 14:52:59
品牌 Logo 应用领域
瑞萨 - RENESAS 光电二极管转换器
页数 文件大小 规格书
10页 120K
描述
IC,D/A CONVERTER,DUAL,8-BIT,CMOS,SOP,8PIN

M62332FP#CF0R 技术参数

是否Rohs认证:符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.82
Is Samacsys:N转换器类型:D/A CONVERTER
输入位码:BINARYJESD-30 代码:R-PDSO-G8
最大线性误差 (EL):0.58%位数:8
功能数量:2端子数量:8
最高工作温度:85 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:5 V
认证状态:Not Qualified子类别:Other Converters
最大压摆率:2.5 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

M62332FP#CF0R 数据手册

 浏览型号M62332FP#CF0R的Datasheet PDF文件第2页浏览型号M62332FP#CF0R的Datasheet PDF文件第3页浏览型号M62332FP#CF0R的Datasheet PDF文件第4页浏览型号M62332FP#CF0R的Datasheet PDF文件第5页浏览型号M62332FP#CF0R的Datasheet PDF文件第6页浏览型号M62332FP#CF0R的Datasheet PDF文件第7页 
Preliminary Datasheet  
M62332P/FP, M62337P/FP  
R03DS0037EJ0500  
Rev.5.00  
8-bit 2ch I2C BUS D/A Converter with Buffer Amplifiers  
Jun 03, 2011  
Description  
The M62332/M62337 is an integrated circuit semiconductor of CMOS structure with 2 channels of built in D/A  
converters with output buffer operational amplifiers.  
The input is 2-wires serial method is used for the transfer format of digital data to allow connection with a  
microcomputer with minimum wiring.  
The output buffer operational amplifier employs AB class output circuit with sync and source drive capacity of 1.0 mA  
or more, and it operates in the whole voltage range from VCC to ground.  
The M62332 and the M62337 differ only in their slave address.  
Features  
Digital data transfer format: I2C BUS serial data method  
Output buffer operational amplifier: It operates in the whole voltage range from VCC to ground.  
High output current drive capacity: 1.0 mA over  
Application  
Conversion from digital data to analog control data for home-use and industrial equipment.  
Signal gain control or automatic adjustment of display-monitor or CTV.  
Block Diagram  
VCC  
8
SCL  
7
SDA  
6
GND  
5
I2C BUS transceiver  
Power on  
reset  
Channel  
decoder  
8
8-bit latch  
8-bit latch  
8-bit upper  
segment R-2R  
8-bit upper  
segment R-2R  
+
+ −  
1
2
AO1  
AO2  
R03DS0037EJ0500 Rev.5.00  
Jun 03, 2011  
Page 1 of 9  

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