MITSUBISHI LSIs
revision-01, ' 98.12.08
M5M5V216ATP,RT
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM
FEATURES
DESCRIPTION
The M5M5V216A is a family of low voltage 2-Mbit static RAMs
organized as 131,072-words by 16-bit, fabricated by Mitsubishi's
high-performance 0.25µm CMOS technology.
Single +2.7~+3.6V power supply
Small stand-by current: 0.3µA(3V,typ.)
No clocks, No refresh
The M5M5V216A is suitable for memory applications where a
simple interfacing , battery operating and battery backup are the
important design objectives.
M5M5V216ATP, RT are packaged in a 44-pin 400mil thin small
outline package. M5M5V216ATP (normal lead bend type package)
, M5M5V216ART (reverse lead bend type package) , both types
are very easy to design a printed circuit board.
From the point of operating temperature, the family is divided into
three versions; "Standard", "W-version", and "I-version". Those are
summarized in the part name table below.
Data retention supply voltage=2.0V to 3.6V
All inputs and outputs are TTL compatible.
Easy memory expansion by S , BC1 and BC2
Common Data I/O
Three-state outputs: OR-tie capability
OE prevents data contention in the I/O bus
Process technology: 0.25µm CMOS
Package: 44 pin 400mil TSOP (II)
PART NAME TABLE
Active
Access
Stand-by current Icc(PD), Vcc=3.0V
typical *
25 C 40 C 25 C 40 C 70 C 85 C
Version,
Operating
temperature
Power
Supply
current
Icc1
(3.0V, typ.)
Part name
Ratings (max.)
time
max.
M5M5V216ATP , RT -55L
M5M5V216ATP , RT -70L
M5M5V216ATP , RT -55H
M5M5V216ATP , RT -70H
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
2.7 ~ 3.6V
2.7 ~ 3.6V
---
---
---
--- 20µA
---
---
Standard
0 ~ +70 C
0.3µA 1µA
1µA 3µA 8µA
45mA
M5M5V216ATP , RT -55LW
M5M5V216ATP , RT -70LW
M5M5V216ATP , RT -55HW
M5M5V216ATP , RT -70HW
(10MHz)
2.7 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
2.7 ~ 3.6V
---
---
---
---
20µA 50µA
W-version
-20 ~ +85 C
5mA
1µA 3µA 8µA 24µA
0.3µA 1µA
(1MHz)
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
55ns(@ 2.7V) / 50ns(@3.3V)
70ns(@ 2.7V) / 65ns(@3.3V)
M5M5V216ATP , RT -55L I
M5M5V216ATP , RT -70L I
M5M5V216ATP , RT -55H I
M5M5V216ATP , RT -70H I
---
---
---
---
20µA 50µA
I-version
-40 ~ +85 C
0.3µA 1µA
1µA 3µA 8µA 24µA
* "typical" parameter is sampled, not 100% tested.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A4
A3
A2
A1
A0
A4
A3
A2
A5
A5
A6
A6
A7
OE
A7
OE
Pin
Function
A1
A0
A0 ~ A16
Address input
BC2
BC1
DQ16
DQ15
DQ14
DQ13
GND
Vcc
BC2
BC1
DQ16
DQ15
DQ14
DQ13
GND
Vcc
S
DQ1
DQ2
DQ3
DQ4
Vcc
S
DQ1 ~ DQ16 Data input / output
DQ1
DQ2
DQ3
DQ4
Vcc
GND
DQ5
DQ6
DQ7
DQ8
WE
A16
A15
A14
A13
A12
Chip select input
Write control input
Output inable input
Lower Byte (DQ1 ~ 8)
Upper Byte (DQ9 ~ 16)
Power supply
S
9
10
11
12
13
14
15
16
17
18
19
20
21
22
W
OE
BC1
GND
DQ5
DQ6
DQ7
DQ8
WE
A16
A15
A14
A13
A12
DQ12
DQ11
DQ10
DQ9
NC
DQ12
DQ11
DQ10
DQ9
NC
BC2
Vcc
A8
A8
GND
Ground supply
A9
A9
Outline: TP : 44P3W - H
A10
A11
NC
A10
A11
RT : 44P3W - J
NC: No Connection
NC
1
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