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M5M5V216ATP-70LW PDF预览

M5M5V216ATP-70LW

更新时间: 2024-11-21 15:39:55
品牌 Logo 应用领域
三菱 - MITSUBISHI 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
8页 100K
描述
Standard SRAM, 128KX16, 70ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

M5M5V216ATP-70LW 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP44,.46,32
针数:44Reach Compliance Code:unknown
ECCN代码:3A991.B.2.AHTS代码:8542.32.00.41
风险等级:5.84最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G44
JESD-609代码:e0长度:18.41 mm
内存密度:2097152 bit内存集成电路类型:STANDARD SRAM
内存宽度:16功能数量:1
端子数量:44字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:128KX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP44,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最小待机电流:2 V子类别:SRAMs
最大压摆率:0.06 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10.16 mmBase Number Matches:1

M5M5V216ATP-70LW 数据手册

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MITSUBISHI LSIs  
revision-02, ' 98.12.08  
M5M5V216ATP,RT  
2097152-BIT (131072-WORD BY 16-BIT) CMOS STATIC RAM  
FEATURES  
DESCRIPTION  
The M5M5V216A is a f amily of low v oltage 2-Mbit static RAMs  
organized as 131,072-words by 16-bit, f abricated by Mitsubishi's  
high-perf ormance 0.25µm CMOS technology .  
The M5M5V216A is suitable f or memory applications where a  
simple interf acing , battery operating and battery backup are the  
important design objectiv es.  
M5M5V216ATP, RT are packaged in a 44-pin 400mil thin small  
outline package. M5M5V216ATP (normal lead bend ty pe package)  
, M5M5V216ART (rev erse lead bend ty pe package) , both ty pes  
are v ery easy to design a printed circuit board.  
From the point of operating temperature, the f amily is div ided into  
three v ersions; "Standard", "W-v ersion", and "I-v ersion". Those are  
summarized in the part name table below.  
Single +2.7~+3.6V power supply  
Small stand-by current: 0.3µA(3V,ty p.)  
No clocks, No ref resh  
Data retention supply v oltage=2.0V to 3.6V  
All inputs and outputs are TTL compatible.  
Easy memory expansion by S , BC1 and BC2  
Common Data I/O  
Three-state outputs: OR-tie capability  
OE prev ents data contention in the I/O bus  
Process technology : 0.25µm CMOS  
Package: 44 pin 400mil TSOP (II)  
PART NAME TABLE  
Activ e  
Stand-by current Icc(PD), Vcc=3.0V  
Access  
Version,  
Operating  
temperature  
Power  
current  
ty pical *  
Part name  
Ratings (max.)  
time  
Icc1  
Supply  
(3.0V, ty p.)  
max.  
25 C 40 C 25 C 40 C 70 C 85 C  
M5M5V216ATP , RT -55L  
M5M5V216ATP , RT -70L  
M5M5V216ATP , RT -55H  
M5M5V216ATP , RT -70H  
M5M5V216ATP , RT -55LW  
M5M5V216ATP , RT -70LW  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
---  
---  
---  
--- 20µA  
---  
---  
Standard  
0 ~ +70 C  
0.3µA 1µA  
1µA 3µA 8µA  
45mA  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
(10MHz)  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
2.7 ~ 3.6V  
---  
---  
---  
---  
20µA 50µA  
W-version  
M5M5V216ATP , RT -55HW  
M5M5V216ATP , RT -70HW  
-20 ~ +85 C  
5mA  
0.3µA 1µA  
1µA 3µA 8µA 24µA  
(1MHz)  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
M5M5V216ATP , RT -55L I  
M5M5V216ATP , RT -70L I  
M5M5V216ATP , RT -55H I  
M5M5V216ATP , RT -70H I  
---  
---  
---  
---  
20µA 50µA  
I-version  
55ns(@ 2.7V) / 50ns(@3.3V)  
70ns(@ 2.7V) / 65ns(@3.3V)  
-40 ~ +85 C  
0.3µA 1µA  
1µA 3µA 8µA 24µA  
* "ty pical" parameter is sampled, not 100% tested.  
PIN CONFIGURATION  
A4  
A3  
A2  
A1  
A0  
1
2
3
4
5
6
7
8
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
A4  
A3  
A2  
A5  
A5  
A6  
A6  
A7  
A7  
Pin  
Function  
OE  
OE  
A1  
A0  
A0 ~ A16  
Address input  
BC2  
BC1  
DQ16  
DQ15  
DQ14  
DQ13  
GND  
Vcc  
BC2  
BC1  
DQ16  
DQ15  
DQ14  
DQ13  
GND  
Vcc  
S
DQ1  
DQ2  
DQ3  
DQ4  
Vcc  
S
DQ1 ~ DQ16 Data input / output  
DQ1  
DQ2  
DQ3  
DQ4  
Vcc  
Chip select input  
Write control input  
Output inable input  
Lower By te (DQ1 ~ 8)  
Upper By te(DQ9 ~ 16)  
Power supply  
S
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
W
OE  
BC1  
GND  
DQ5  
DQ6  
DQ7  
DQ8  
WE  
GND  
DQ5  
DQ6  
DQ7  
DQ8  
WE  
DQ12  
DQ11  
DQ10  
DQ9  
NC  
DQ12  
DQ11  
DQ10  
DQ9  
NC  
BC2  
Vcc  
A16  
A16  
A15  
A14  
A13  
A12  
A8  
A8  
GND  
Ground supply  
A15  
A9  
A9  
Outline: TP : 44P3W - H  
A14  
A10  
A10  
A13  
A11  
A11  
RT : 44P3W - J  
NC: No Connection  
A12  
NC  
NC  
1
MITSUBISHI ELECTRIC  

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