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M5M465165BTP-6 PDF预览

M5M465165BTP-6

更新时间: 2024-11-20 22:46:39
品牌 Logo 应用领域
三菱 - MITSUBISHI /
页数 文件大小 规格书
39页 402K
描述
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM

M5M465165BTP-6 数据手册

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(Rev. 1.1)  
MITSUBISHI LSIs  
M5M467405/465405BJ,BTP -5,-6,-5S,-6S  
M5M467805/465805BJ,BTP -5,-6,-5S,-6S  
M5M465165BJ,BTP -5,-6,-5S,-6S  
EDO MODE 67108864-BIT (16777216-WORD BY 4-BIT) DYNAMIC RAM  
EDO MODE 67108864-BIT (8388608-WORD BY 8-BIT) DYNAMIC RAM  
EDO MODE 67108864-BIT (4194304-WORD BY 16-BIT) DYNAMIC RAM  
DESCRIPTION  
The M5M467405/465405BJ,BTP is organized 16777216-word by 4-bit, M5M467805/465805BJ,BTP is organized 8388608-word by  
8-bit, and M5M465165BJ,BTP is organized 4194304-word by 16-bit dynamic RAMs, fabricated with the high performance CMOS  
process, and are suitable for large-capacity memory systems with high speed and low power dissipation.  
The use of double-layer aluminum process combined with CMOS technology and a single-transistor dynamic storage stacked  
capacitor cell provide high circuit density. Multiplexed address inputs permit both a reduction in pins and an increase in system  
densities.  
FEATURES  
Address  
access access access  
time time time  
Power  
dissipa-  
tion  
RAS  
OE  
Power  
dissipa-  
tion  
CAS  
Cycle  
time  
Address  
access  
time  
RAS  
access access  
time time  
CAS  
OE  
Cycle  
time  
access  
time  
access  
time  
Type name  
Type name  
(max.ns) (max.ns) (max.ns) (max.ns) (min.ns) (typ.mW)  
(max.ns) (max.ns) (max.ns) (max.ns)  
(min.ns)  
(typ.mW)  
M5M467405BXX-5,5S  
M5M467805BXX-5,5S  
50  
60  
M5M465165BXX-5,5S  
M5M465165BXX-6,6S  
13  
15  
420  
13  
15  
84  
25  
30  
50  
60  
50  
60  
13  
15  
13  
15  
25  
30  
25  
30  
13  
15  
13  
15  
300  
250  
390  
325  
84  
104  
84  
M5M467405BXX-6,6S  
M5M467805BXX-6,6S  
390  
104  
M5M465405BXX-5,5S  
M5M465805BXX-5,5S  
M5M465405BXX-6,6S  
M5M465805BXX-6,6S  
104  
XX=J,TP  
(M5M467405Bxx/M5M465405Bxx/M5M467805Bxx/M5M465805Bxx)  
(M5M465165Bxx)  
Standard 32 pin SOJ, 32 pin TSOP  
Standard 50 pin SOJ, 50 pin TSOP  
±
Single 3.3 0.3V supply  
Low stand-by power dissipation  
1.8mW (Max)  
LVCMOS input level  
Low operating power dissipation  
M5M467405Bxx-5,5S / M5M467805Bxx-5,5S  
M5M467405Bxx-6,6S / M5M467805Bxx-6,6S  
M5M465405Bxx-5,5S / M5M465805Bxx-5,5S  
M5M465405Bxx-6,6S / M5M465805Bxx-6,6S  
M5M465165Bxx-5,5S  
360.0mW (Max)  
324.0mW (Max)  
468.0mW (Max)  
432.0mW (Max)  
504.0mW (Max)  
468.0mW (Max)  
M5M465165Bxx-6,6S  
Self refresh capability*  
Self refresh current  
400µA (Max)  
EDO mode , Read-modify-write, CAS before RAS refresh, Hidden refresh capabilities  
Early-write mode , OE and W to control output buffer impedance  
All inputs, outputs LVTTL compatible and low capacitance  
:Applicable to self refresh version(M5M467405/465405/467805/465805/465165BJ,BTP-5S,-6S:option) only  
*
ADDRESS  
Refresh Cycle  
Normal S-version  
8192/64ms 8192/128ms  
Row Add Col Add  
A0-A12 A0-A10  
Refresh  
Part No.  
RAS Only Ref,Normal R/W  
CBR Ref,Hidden Ref  
M5M467405Bxx  
4096/64ms  
4096/64ms  
4096/128ms  
4096/128ms  
RAS Only Ref,Normal R/W  
CBR Ref,Hidden Ref  
M5M465405Bxx A0-A11 A0-A11  
8192/64ms 8192/128ms  
RAS Only Ref,Normal R/W  
CBR Ref,Hidden Ref  
A0-A12 A0-A9  
M5M467805Bxx  
4096/64ms  
4096/64ms  
4096/128ms  
4096/128ms  
RAS Only Ref,Normal R/W  
CBR Ref,Hidden Ref  
A0-A10  
A0-A9  
M5M465805Bxx A0-A11  
M5M465165Bxx A0-A11  
RAS Only Ref,Normal R/W  
CBR Ref,Hidden Ref  
4096/128ms  
4096/64ms  
APPLICATION  
Main memory unit for computers, Microcomputer memory, Refresh memory for CRT  
1
Jun. 1999  
MITSUBISHI  
ELECTRIC  

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