Datasheet > M471B5673GB0-CF8

M471B5673GB0-CF8

更新时间： 2023-08-15 00:00:00

品牌	Logo	应用领域
三星 - SAMSUNG		动态存储器双倍数据速率
页数	文件大小	规格书
37页	1085K
描述
DDR DRAM, 256MX64, 0.6ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-204

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M471B5673GB0-CF8 数据手册

Rev. 1.1

Unbuffered SODIMM

datasheet

DDR3 SDRAM

1. DDR3 Unbuffered SODIMM Ordering Information

Number of

Height

Part Number²

Density

Organization

Component Composition

Rank

128Mx8(K4B1G0846G-BC##¹)*8

128Mx8(K4B1G0846G-BC##¹)*16

1GB

2GB

128Mx64

256Mx64

30mm

M471B2873GB0-CF8/H9/K0/MA

M471B5673GB0-CF8/H9/K0/MA

NOTE :

1. "##" - F8/H9/K0/MA

2. F8 - 1066Mbps 7-7-7 / H9 - 1333Mbps 9-9-9 / K0 - 1600Mbps 11-11-11/ MA - 1866Mbps 13-13-13

- DDR3-1866(13-13-13) is backward compatible to DDR3-1600(11-11-11), DDR3-1333(9-9-9), DDR3-1066(7-7-7)

- DDR3-1600(11-11-11) is backward compatible to DDR3-1333(9-9-9), DDR3-1066(7-7-7)

- DDR3-1333(9-9-9) is backward compatible to DDR3-1066(7-7-7)

2. Key Features

DDR3-800

6-6-6

2.5

DDR3-1066

7-7-7

DDR3-1333

9-9-9

1.5

DDR3-1600

11-11-11

1.25

DDR3-1866

13-13-13

1.07

Speed

Unit

tCK(min)

CAS Latency

tRCD(min)

tRP(min)

1.875

tCK

13.125

37.5

13.5

13.75

13.91

tRAS(min)

tRC(min)

37.5

52.5

50.625

49.5

48.75

47.91

•

JEDEC standard 1.5V ± 0.075V Power Supply

V_DDQ= 1.5V ± 0.075V

•

400MHz f_CKfor 800Mb/sec/pin, 533MHz f_CKfor 1066Mb/sec/pin, 667MHz f_CKfor 1333Mb/sec/pin, 800MHz f_CKfor 1600Mb/sec/pin,

933MHz f_CKfor 1866Mb/sec/pin

•

8 independent internal bank

Programmable CAS Latency: 5,6,7,8,9,10,11,13

Programmable Additive Latency(Posted CAS) : 0, CL - 2, or CL - 1 clock

Programmable CAS Write Latency(CWL) = 5 (DDR3-800), 6 (DDR3-1066), 7 (DDR3-1333), 8 (DDR3-1600) and 9 (DDR3-1866)

Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or

write [either On the fly using A12 or MRS]

•

Bi-directional Differential Data Strobe

On Die Termination using ODT pin

Average Refresh Period 7.8us at lower then T_CASE85°C, 3.9us at 85°C < T_CASE≤ 95°C

•

Asynchronous Reset

3. Address Configuration

Organization

Row Address

Column Address

Bank Address

Auto Precharge

128x8(1Gb) based Module

A0-A13

A0-A9

BA0-BA2

A10/AP

- 4 -

1 2 345 6 7...37

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