5秒后页面跳转
捷配首页

Datasheet > M471B5673GB0-CF8
M471B5673GB0-CF8 PDF预览

M471B5673GB0-CF8

更新时间： 2023-08-15 00:00:00
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器双倍数据速率
页数 文件大小 规格书
37页 1085K
描述
DDR DRAM, 256MX64, 0.6ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-204

阅读下载

中文翻译

获取价格

M471B5673GB0-CF8 数据手册

 浏览型号M471B5673GB0-CF8的Datasheet PDF文件第29页浏览型号M471B5673GB0-CF8的Datasheet PDF文件第30页浏览型号M471B5673GB0-CF8的Datasheet PDF文件第31页浏览型号M471B5673GB0-CF8的Datasheet PDF文件第33页浏览型号M471B5673GB0-CF8的Datasheet PDF文件第34页浏览型号M471B5673GB0-CF8的Datasheet PDF文件第35页 
Rev. 1.1  
Unbuffered SODIMM  
datasheet  
DDR3 SDRAM  
[ Table 20 ] Timing Parameters by Speed Bins for DDR3-1600, DDR3-1866 (Cont.)  
Speed  
Parameter  
Command and Address Timing  
DLL locking time  
DDR3-1600  
DDR3-1866  
Units  
NOTE  
Symbol  
MIN  
MAX  
MIN  
MAX  
tDLLK  
tRTP  
512  
-
-
512  
-
-
nCK  
max  
max  
internal READ Command to PRECHARGE Command delay  
e
(4nCK,7.5ns)  
(4nCK,7.5ns)  
Delay from start of internal write transaction to internal read com-  
mand  
max  
(4nCK,7.5ns)  
max  
(4nCK,7.5ns)  
tWTR  
-
-
e,18  
e
WRITE recovery time  
tWR  
15  
4
-
-
15  
4
-
-
ns  
Mode Register Set command cycle time  
tMRD  
nCK  
max  
(12nCK,15ns)  
max  
(12nCK,15ns)  
Mode Register Set command update delay  
CAS# to CAS# command delay  
tMOD  
tCCD  
-
-
-
-
4
4
nCK  
nCK  
WR + roundup (tRP /  
tCK(AVG))  
Auto precharge write recovery + precharge time  
tDAL(min)  
Multi-Purpose Register Recovery Time  
tMPRR  
tRAS  
1
-
1
-
nCK  
ns  
22  
e
ACTIVE to PRECHARGE command period  
See “Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin” on page 42  
max  
(4nCK,6ns)  
max  
(4nCK, 5ns)  
ACTIVE to ACTIVE command period for 1KB page size  
ACTIVE to ACTIVE command period for 2KB page size  
tRRD  
tRRD  
-
-
-
-
e
e
max  
(4nCK,7.5ns)  
max  
(4nCK, 6ns)  
Four activate window for 1KB page size  
Four activate window for 2KB page size  
tFAW  
tFAW  
30  
40  
-
-
27  
35  
-
-
ns  
ns  
e
e
tIS(base)  
AC175  
45  
-
-
-
-
-
-
-
-
-
-
ps  
ps  
ps  
ps  
b,16  
b,16  
tIS(base)  
AC150  
170  
Command and Address setup time to CK, CK referenced to  
V
(AC) / V (AC) levels  
IH  
IL  
tIS(base)  
AC135  
-
-
65  
150  
b,16  
tIS(base)  
AC125  
b,16,27  
Command and Address hold time from CK, CK referenced to  
(AC) / V (AC) levels  
tIH(base)  
DC100  
120  
560  
-
-
100  
535  
-
-
ps  
ps  
b,16  
28  
V
IH  
IL  
Control & Address Input pulse width for each input  
Calibration Timing  
tIPW  
Power-up and RESET calibration time  
Normal operation Full calibration time  
Normal operation short calibration time  
Reset Timing  
tZQinitI  
tZQoper  
tZQCS  
512  
256  
64  
-
-
-
max(512nCK,640ns)  
max(256nCK,320ns)  
max(64nCK,80ns)  
-
-
-
nCK  
nCK  
nCK  
23  
max(5nCK, tRFC +  
10ns)  
max(5nCK, tRFC +  
10ns)  
Exit Reset from CKE HIGH to a valid command  
Self Refresh Timing  
tXPR  
-
-
max(5nCK,tRFC +  
10ns)  
max(5nCK,tRFC +  
10ns)  
Exit Self Refresh to commands not requiring a locked DLL  
tXS  
-
-
Exit Self Refresh to commands requiring a locked DLL  
Minimum CKE low width for Self refresh entry to exit timing  
tXSDLL  
tCKESR  
tDLLK(min)  
-
-
tDLLK(min)  
-
-
nCK  
tCKE(min) + 1tCK  
tCKE(min) + 1nCK  
Valid Clock Requirement after Self Refresh Entry (SRE) or Power-  
Down Entry (PDE)  
max(5nCK,  
10ns)  
max(5nCK,  
10ns)  
tCKSRE  
tCKSRX  
-
-
-
-
Valid Clock Requirement before Self Refresh Exit (SRX) or Power-  
Down Exit (PDX) or Reset Exit  
max(5nCK,  
10ns)  
max(5nCK,  
10ns)  
- 32 -  
1...29303132333435...37

中文翻译

下载PDF

与M471B5673GB0-CF8相关器件

型号 品牌 获取价格 描述 数据表
M471B5673GB0-CH9 SAMSUNG

获取价格

 		DDR DRAM, 256MX64, 0.6ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-204
M471B5673GB0-CK0 SAMSUNG

获取价格

 		DDR DRAM, 256MX64, 0.6ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-204
M471B5773CHS SAMSUNG

获取价格

 		DDR3 SDRAM Memory
M471B5773CHS-CH9 SAMSUNG

获取价格

 		DDR DRAM Module, 256MX8, 0.25ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-204
M471B5773DH0-CH9 SAMSUNG

获取价格

 		DDR DRAM Module, 256MX64, 0.255ns, CMOS, SODIMM-204
M471B5773DH0-CMA SAMSUNG

获取价格

 		DDR DRAM Module, 256MX64, 0.195ns, CMOS, SODIMM-204
M471B6474DZ1-CF7 SAMSUNG

获取价格

 		DDR DRAM Module, 64MX64, 0.4ns, CMOS, ROHS COMPLIANT, SO-DIMM-204
M471B6474DZ1-CG8 SAMSUNG

获取价格

 		DDR DRAM Module, 64MX64, CMOS, ROHS COMPLIANT, SO-DIMM-204
M471B6474DZ1-CH9 SAMSUNG

获取价格

 		DDR DRAM Module, 64MX64, 0.255ns, CMOS, ROHS COMPLIANT, SO-DIMM-204
M471CI8AE NUVOTON

获取价格

 		WLCSP100

与M471B5673GB0-CF8相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证