M372F0400CW0/CZ0
M372F0410CW0/CZ0
DRAM MODULE
M372F0400CW(Z)0 / M372F0410CW(Z)0 EDO Mode
4M x 72 DRAM DIMM with ECC using 4Mx4, 4K/2K Refresh, 3.3V
GENERAL DESCRIPTION
FEATURES
The Samsung M372F040(1)0C is a 4Mx72bits Dynamic RAM
high density memory module. The Samsung M372F040(1)0C
consists of eighteen CMOS 4Mx4bits DRAMs in SOJ/TSOP-II
300mil package, and two 16bits driver IC in 48pin TSSOP
package mounted on a 168-pin glass-epoxy substrate. A 0.1 or
0.22uF decoupling capacitor is mounted on the printed circuit
board for each DRAM. The M372F040(1)0C is a Dual In-line
Memory Module and is intended for mounting into 168-pin
edge connector sockets.
• Part Identification
- M372F0400CW0 (4096 cycles/64ms Ref., SOJ)
- M372F0400CZ0 (4096 cycles/64ms Ref., TSOP)
- M372F0410CW0 (2048 cycles/32ms Ref., SOJ)
- M372F0410CZ0 (2048 cycles/32ms Ref., TSOP)
• Extended Data Out Mode Operation
• CAS-before-RAS Refresh capability
• RAS-only and Hidden refresh capability
• TTL compatible inputs and outputs
PERFORMANCE RANGE
• Single 3.3V±0.3V power supply
Speed
-50
tRAC
50ns
60ns
tCAC
18ns
20ns
tRC
tHPC
25ns
30ns
• JEDEC standard pinout & Buffered PDpin
• Buffered input except RAS and DQ
• PCB : Height(1000mil), double sided component
90ns
110ns
-60
PIN CONFIGURATIONS
PIN NAMES
Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back
Pin Names
Function
A0, B0, A1 - A11 Address Input (4K Ref.)
A0, B0, A1 - A10 Address Input (2K Ref.)
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
1
2
3
4
5
6
7
8
9
VSS
29 RSVD
DQ22 85
DQ23 86 DQ36 114 *RAS1 142 DQ59
87 DQ37 115 RFU 143 VCC
DQ24 88 DQ38 116 VSS 144 DQ60
VSS 113 RSVD 141 DQ58
DQ0 30 RAS0
DQ1 31 OE0
DQ2 32
DQ3 33
DQ0 - DQ71
W0, W2
OE, OE2
RAS0, RAS2
CAS0, CAS4
VCC
Data In/Out
VCC
VSS
A0
Read/Write Enable
Output Enable
RFU 89 DQ39 117
RFU 90 VCC 118
RFU 91 DQ40 119
RFU 92 DQ41 120
DQ25 93 DQ42 121
A1
A3
A5
A7
A9
145 RFU
146 RFU
147 RFU
148 RFU
149 DQ61
VCC
34
A2
Row Address Strobe
Colume Address Strobe
Power(+3.3V)
DQ4 35
DQ5 36
DQ6 37
A4
A6
A8
A10
10 DQ7 38
11 DQ8 39 *A12
12 40
13 DQ9 41 RFU
14 DQ10 42 RFU
15 DQ11 43
16 DQ12 44 OE2
17 DQ13 45 RAS2
18
19 DQ14 47 RSVD
20 DQ15 48
21 DQ16 49
22 DQ17 50 RSVD
23 51 RSVD
24 RSVD 52 DQ18
25 RSVD 53 DQ19
26
27
DQ26 94 DQ43 122 A11 150 DQ62
DQ27 95 DQ44 123 *A13 151 DQ63
VSS
Ground
NC
No Connection
Presence Detect Enable
Presence Detect
ID bit
VSS
VCC
VSS
96
DQ28 97 DQ45 125 RFU 153 DQ64
DQ29 98 DQ46 126 B0 154 DQ65
VSS 124 VCC 152 VSS
PDE
PD1 - 8
ID0 - 1
RSVD
VSS
DQ30 99 DQ47 127 VSS 155 DQ66
DQ31 100 DQ48 128 RFU 156 DQ67
VCC 101 DQ49 129 *RAS3 157 VCC
DQ32 102 VCC 130 *CAS5 158 DQ68
DQ33 103 DQ50 131 RSVD 159 DQ69
DQ34 104 DQ51 132 PDE 160 DQ70
DQ35 105 DQ52 133 VCC 161 DQ71
VSS 106 DQ53 134 RSVD 162 VSS
PD1 107 VSS 135 RSVD 163 PD2
PD3 108 RSVD 136 DQ54 164 PD4
PD5 109 RSVD 137 DQ55 165 PD6
PD7 110 VCC 138 VSS 166 PD8
ID0 111 RFU 139 DQ56 167 ID1
VCC 112 *CAS1 140 DQ57 168 VCC
Reserved Use
VCC
46 CAS4
RFU
Reserved for Future Use
Pins marked ¢*¢ are not used in this module.
W2
VCC
PD & ID Table
Pin
50NS
60NS
VSS
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
1
1
0
1
1
0
0
0
1
1
0
1
1
1
1
0
VCC
W0
54
VSS
55 DQ20
28 CAS0 56 DQ21
NOTE : A11 is used for only M372F0400CWO/CZ0 (4K ref.)
ID0
ID1
0
0
0
0
PD Note : PD & ID Terminals must each be pulled up through a resister to VCC at the next higher
level assembly. PDs will be either open (NC) or driven to VSS via on-board buffer circuits.
ID Note : IDs will be either open (NC) or connected directly to VSS without a buffer.
PD : 0 for Vol of Drive IC & 1 for N.C
ID : 0 for Vss & 1 for N.C