Datasheet > M29F002T-120K1

M29F002T-120K1

更新时间： 2024-01-23 18:17:16

品牌	Logo	应用领域
恒忆 - NUMONYX		内存集成电路
页数	文件大小	规格书
29页	233K
描述
Flash, 256KX8, 120ns, PQCC32, PLASTIC, LCC-32

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技术参数
数据手册

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M29F002T-120K1 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
零件包装代码：	QFJ	包装说明：	PLASTIC, LCC-32
针数：	32	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.32.00.51
风险等级：	5.19	最长访问时间：	120 ns
其他特性：	TOP BOOT BLOCK	启动块：	TOP
命令用户界面：	YES	数据轮询：	YES
耐久性：	100000 Write/Erase Cycles	JESD-30 代码：	R-PQCC-J32
JESD-609代码：	e0	长度：	13.995 mm
内存密度：	2097152 bit	内存集成电路类型：	FLASH
内存宽度：	8	功能数量：	1
部门数/规模：	1,2,1,3	端子数量：	32
字数：	262144 words	字数代码：	256000
工作模式：	ASYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	256KX8
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC32,.5X.6
封装形状：	RECTANGULAR	封装形式：	CHIP CARRIER
并行/串行：	PARALLEL	电源：	5 V
编程电压：	5 V	认证状态：	Not Qualified
座面最大高度：	3.56 mm	部门规模：	16K,8K,32K,64K
最大待机电流：	0.0001 A	子类别：	Flash Memories
最大压摆率：	0.02 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	J BEND	端子节距：	1.27 mm
端子位置：	QUAD	切换位：	YES
类型：	NOR TYPE	宽度：	11.455 mm
Base Number Matches：	1

M29F002T-120K1 数据手册

M29F002T, M29F002NT, M29F002B

Instructions

impedance when the chip is deselected or the

outputs are disabled and when RPNC is at a Low

level.

Seven instructions are defined to perform Read

Array, Auto Select (to read the Electronic Signature

or Block Protection Status), Program, Block Erase,

Chip Erase, Erase Suspend and Erase Resume.

The internal P/E.C.automatically handles all timing

and verification of the Program and Erase opera-

tions. The Status Register Data Polling, Toggle,

Error bits may be read at any time, during program-

ming or erase, to monitor the progress of the opera-

tion.

Chip Enable (E). The Chip Enable input activates

the memory control logic, input buffers, decoders

and sense amplifiers.E High deselects the memory

and reduces the power consumption to the standby

level. E can also be used to control writing to the

command register and to the memory array, while

W remains at a low level. The Chip Enable must be

forced to V_IDduring the Block Unprotection opera-

tion.

Instructions are composed of up to six cycles. The

first two cycles input a Coded sequence to the

Command Interface which is common to all instruc-

tions (see Table 8). The third cycle inputs the in-

struction set-up command. Subsequent cycles

output the addressed data, Electronic Signature or

Block Protection Status for Read operations. In

order to give additional data protection, the instruc-

tions for Program and Block or Chip Erase require

further command inputs.For a Program instruction,

the fourth command cycle inputs the address and

data to be programmed. For an Erase instruction

(Block or Chip), the fourth and fifth cycles input a

further Coded sequence before the Erase confirm

command on the sixth cycle. Erasure of a memory

block may be suspended, in order to read data from

another block or to program data in another block,

and then resumed.

Output Enable (G). The Output Enable gates the

outputs through the data buffers during a read

operation. When G is High the outputs are High

impedance. G must be forced to V_IDlevel during

Block Protection and Unprotection operations.

Write Enable (W). This input controls writing to the

Command Register and Address and Data latches.

Reset/Block Temporary Unprotect/No Connect

Input (RPNC). The RPNC (not available for the

M29F002NT) input provides hardware reset and

protected block(s) temporary unprotection func-

tions. In read or write mode, the RPNC pin can be

left open (Not Connected) or held at V_IH. Reset of

the memory is acheived by pulling RPNC to V_ILfor

at least 500ns. When the reset pulse is given, if the

memory is in Read or Standby modes, it will be

available for new operations in 50ns after the rising

edge of RPNC. If the memory is in Erase, Erase

Suspend or Program modes the reset will take

10µs.Ahardware reset during an Erase or Program

operation will corrupt the data being programmed

or the sector(s) being erased.

When power is first applied or if V_CCfalls below

V_LKO, the command interface is reset to Read Array.

SIGNAL DESCRIPTIONS

Temporary block unprotection is made by holding

RPNC at V_ID. In this condition previously protected

blocks can be programmed or erased. The transi-

tion of RPNC from V_IHto V_IDmust slower than

500ns. When RPNC is returned from V_IDto V_IHall

blocks temporarily unprotected will be again pro-

tected.

See Figure 1 and Table 1.

Address Inputs (A0-A17). The address inputs for

the memory array are latched during a write opera-

tion on the falling edge of Chip Enable E or Write

Enable W. When A9 is raised to V_ID, either a Read

Electronic Signature Manufacturer or Device Code,

Block Protection Status or a Write Block Protection

or Block Unprotection is enabled depending on the

combination of levels on A0, A1, A6, A12 and A15.

V_CCSupply Voltage. The power supply for all op-

erations (Read, Program and Erase).

V_SSGround. V_SSis the reference for all voltage

Data Input/Outputs (DQ0-DQ7). The input is data

to be programmed in the memory array or a com-

mand to be written to the C.I. Both are latched on

the rising edge of Chip Enable E or Write Enable

W. The output is data from the Memory Array, the

Electronic Signature Manufacturer or Device

codes, the Block Protection Status or the Status

and DQ2, the Error bit DQ5 or the Erase Timer bit

DQ3. Outputs are valid when Chip Enable E and

Output Enable G are active. The output is high

measurements.

DEVICE OPERATIONS

See Tables 4, 5 and 6.

Read. Read operations are used to output the con-

tents ofthe Memory Array, the ElectronicSignature,

the Status Register or the Block Protection Status.

Both Chip Enable E and Output Enable G must be

low in order to read the output of the memory.

5/29

1 2 3 456 7 8...29

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与M29F002T-120K1相关器件

型号	品牌	获取价格	描述	数据表
M29F002T-120K1TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120K1TR	NUMONYX	获取价格	Flash, 256KX8, 120ns, PQCC32, PLASTIC, LCC-32
M29F002T-120K6	NUMONYX	获取价格	256KX8 FLASH 5V PROM, 120ns, PQCC32, PLASTIC, LCC-32
M29F002T-120K6TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120N1TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120N1TR	NUMONYX	获取价格	Flash, 256KX8, 120ns, PDSO32, 8 X 20 MM, PLASTIC, TSOP-32
M29F002T-120N6TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120P1TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120P6TR	STMICROELECTRONICS	获取价格	2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
M29F002T-120XK1	NUMONYX	获取价格	256KX8 FLASH 5V PROM, 120ns, PQCC32, PLASTIC, LCC-32

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