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M27V401-200K1 PDF预览

M27V401-200K1

更新时间: 2024-10-28 13:09:59
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 105K
描述
512KX8 OTPROM, 200ns, PQCC32, PLASTIC, LCC-32

M27V401-200K1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.91最长访问时间:200 ns
I/O 类型:COMMONJESD-30 代码:R-PQCC-J32
JESD-609代码:e0长度:13.97 mm
内存密度:4194304 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:32字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:3.56 mm
最大待机电流:0.00002 A子类别:OTP ROMs
最大压摆率:0.015 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:11.43 mmBase Number Matches:1

M27V401-200K1 数据手册

 浏览型号M27V401-200K1的Datasheet PDF文件第2页浏览型号M27V401-200K1的Datasheet PDF文件第3页浏览型号M27V401-200K1的Datasheet PDF文件第4页浏览型号M27V401-200K1的Datasheet PDF文件第5页浏览型号M27V401-200K1的Datasheet PDF文件第6页浏览型号M27V401-200K1的Datasheet PDF文件第7页 
M27V401  
4 Mbit (512Kb x8) Low Voltage UV EPROM and OTP EPROM  
LOW VOLTAGE READ OPERATION:  
3V to 3.6V  
FAST ACCESS TIME: 120ns  
LOW POWER CONSUMPTION:  
32  
32  
– Active Current 15mA at 5MHz  
– Standby Current 20µA  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
FDIP32W (F)  
PDIP32 (B)  
– Device Code: 41h  
DESCRIPTION  
The M27V401 is a low voltage 4 Mbit EPROM of-  
fered in the two range UV (ultra violet erase) and  
OTP (one time programmable). It is ideally suited  
for microprocessor systems requiring large data or  
program storage and is organised as 524,288 by 8  
bits.  
PLCC32 (K)  
TSOP32 (N)  
8 x 20 mm  
Figure 1. Logic Diagram  
The M27V401 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
V
CC  
PP  
The FDIP32W (window ceramic frit-seal package)  
has a transparent lid which allow the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
19  
8
A0-A18  
Q0-Q7  
Table 1. Signal Names  
E
M27V401  
A0-A18  
Q0-Q7  
E
Address Inputs  
Data Outputs  
Chip Enable  
Output Enable  
Program Supply  
Supply Voltage  
Ground  
G
G
V
SS  
V
V
V
PP  
CC  
SS  
AI00695B  
May 1998  
1/15  

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