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M27V256-100K1 PDF预览

M27V256-100K1

更新时间: 2024-10-27 20:00:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 可编程只读存储器OTP只读存储器内存集成电路
页数 文件大小 规格书
15页 103K
描述
32KX8 OTPROM, 100ns, PQCC32, PLASTIC, LCC-32

M27V256-100K1 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFJ包装说明:PLASTIC, LCC-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:100 ns
I/O 类型:COMMONJESD-30 代码:R-PQCC-J32
JESD-609代码:e0长度:13.97 mm
内存密度:262144 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:32字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC32,.5X.6封装形状:RECTANGULAR
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
编程电压:12.75 V认证状态:Not Qualified
座面最大高度:3.56 mm最大待机电流:0.00001 A
子类别:OTP ROMs最大压摆率:0.01 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:11.43 mm
Base Number Matches:1

M27V256-100K1 数据手册

 浏览型号M27V256-100K1的Datasheet PDF文件第2页浏览型号M27V256-100K1的Datasheet PDF文件第3页浏览型号M27V256-100K1的Datasheet PDF文件第4页浏览型号M27V256-100K1的Datasheet PDF文件第5页浏览型号M27V256-100K1的Datasheet PDF文件第6页浏览型号M27V256-100K1的Datasheet PDF文件第7页 
M27V256  
256 Kbit (32Kb x 8) Low Voltage UV EPROM and OTP EPROM  
NOT FOR NEW DESIGN  
M27V256 is replaced by the M27W256  
3V to 3.6V LOW VOLTAGE in READ  
OPERATION  
ACCESS TIME: 90ns  
28  
LOW POWER CONSUMPTION:  
28  
– Active Current 10mA at 5MHz  
1
1
– Standby Current 10µA  
FDIP28W (F)  
PDIP28 (B)  
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/word  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 8Dh  
PLCC32 (K)  
TSOP28 (N)  
8 x 13.4mm  
DESCRIPTION  
The M27V256 is a low voltage 256 Kbit EPROM  
offered in the two ranges UV (ultra violet erase)  
and OTP (one time programmable). It is ideally  
suited for microprocessor systems and is orga-  
nized as 32,768 by 8 bits.  
Figure 1. Logic Diagram  
The M27V256 operates in the read mode with a  
supply voltage as low as 3V. The decrease in op-  
erating power allows either a reduction of the size  
of the battery or an increase in the time between  
battery recharges.  
V
V
PP  
CC  
The FDIP28W (window ceramic frit-seal package)  
has a transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
15  
8
A0-A14  
Q0-Q7  
For applications where the content is programmed  
only one time and erasure is not required, the  
M27V256 is offered in PDIP28, PLCC32 and  
TSOP28 (8 x 13.4 mm) packages.  
E
M27V256  
G
V
SS  
AI01908  
July 2000  
1/15  
This is information on a product still in production but not recommended for new designs.  

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