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M27C160-90XK1TR PDF预览

M27C160-90XK1TR

更新时间: 2024-10-26 22:08:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
16页 112K
描述
16 Mbit 2Mb x8 or 1Mb x16 UV EPROM and OTP EPROM

M27C160-90XK1TR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC44,.7SQ
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.83Is Samacsys:N
最长访问时间:90 ns其他特性:CONFIGURABLE AS 1M X 16
备用内存宽度:8I/O 类型:COMMON
JESD-30 代码:S-PQCC-J44JESD-609代码:e3
长度:16.585 mm内存密度:16777216 bit
内存集成电路类型:OTP ROM内存宽度:16
功能数量:1端子数量:44
字数:1048576 words字数代码:1000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:1MX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:4.57 mm最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.07 mA
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:16.585 mm
Base Number Matches:1

M27C160-90XK1TR 数据手册

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M27C160  
16 Mbit (2Mb x8 or 1Mb x16) UV EPROM and OTP EPROM  
5V ± 10% SUPPLY VOLTAGE in READ  
OPERATION  
FAST ACCESS TIME: 70ns  
BYTE-WIDE or WORD-WIDE  
42  
42  
CONFIGURABLE  
16 Mbit MASK ROM REPLACEMENT  
LOW POWER CONSUMPTION  
– Active Current 70mA at 8MHz  
– Standby Current 100µA  
1
1
FDIP42W (F)  
PDIP42 (B)  
PROGRAMMING VOLTAGE: 12.5V ± 0.25V  
PROGRAMMING TIME: 100µs/byte (typical)  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 0020h  
44  
1
– Device Code: 00B1h  
PLCC44 (K)  
SO44 (M)  
DESCRIPTION  
The M27C160 is a 16 Mbit EPROM offered in the  
two ranges UV (ultra violet erase) and OTP (one  
time programmable). It is ideally suited for micro-  
processor systems requiring large data or program  
storage and is organised as either 2 Mbit words of  
8 bit or 1 Mbit words of 16 bit. The pin-out is com-  
patible with a 16 Mbit Mask ROM.  
The FDIP42W (window ceramic frit-seal package)  
has a transparent lid which allows the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern.  
Figure 1. Logic Diagram  
V
CC  
20  
Q15A–1  
A0-A19  
15  
Table 1. Signal Names  
Q0-Q14  
E
M27C160  
A0-A19  
Q0-Q7  
Q8-Q14  
Q15A–1  
E
Address Inputs  
Data Outputs  
G
Data Outputs  
BYTEV  
PP  
Data Output / Address Input  
Chip Enable  
G
Output Enable  
V
SS  
AI00739B  
BYTEV  
Byte Mode / Program Supply  
Supply Voltage  
Ground  
PP  
V
V
CC  
SS  
February 1999  
1/16  

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