LTC2216/LTC2215
16-Bit, 80Msps/65Msps
Low Noise ADC
FEATURES
DESCRIPTION
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Sample Rate: 80Msps/65Msps
TheLTC®2216/LTC2215are80Msps/65Mspssampling16-
bit A/D converters designed for digitizing high frequency,
wide dynamic range signals with input frequencies up to
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81.5dBFS Noise Floor
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100dB SFDR
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SFDR >95dB at 70MHz
400MHz. The input range of the ADC is fixed at 2.75V
.
P-P
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85fs
Jitter
RMS
The LTC2216/LTC2215 are perfect for demanding com-
munications applications, with AC performance that
includes 81.5dBFS noise floor and 100dB spurious free
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2.75V Input Range
P-P
400MHz Full Power Bandwidth S/H
Optional Internal Dither
dynamic range (SFDR). Ultra low jitter of 85fs
allows
RMS
Optional Data Output Randomizer
LVDS or CMOS Outputs
Single ±.±V Supply
Power Dissipation: 970mW/700mW
Clock Duty Cycle Stabilizer
Pin-Compatible with LTC2208, LTC2217
64-Pin (9mm × 9mm) QFI Package
undersamplingofhighinputfrequencieswhilemaintaining
excellent noise performance. Maximum DC specs include
±±.5LSB ꢀIL, ±1LSB DIL (no missing codes).
The digital output can be either differential LVDS or
single-ended CMOS. There are two format options for the
CMOS outputs: a single bus running at the full data rate or
demultiplexed buses running at half data rate. A separate
output power supply allows the CMOS output swing to
range from 0.5V to ±.6V.
APPLICATIONS
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Telecommunications
+
–
The EIC and EIC inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed with a wide range of
clock duty cycles.
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Receivers
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Cellular Base Stations
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Spectrum Analysis
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ꢀmaging Systems
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ATE
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
±.±V
LTC2216: 64k Point FFT,
fIN = 4.9MHz, –1dBFS
SEISE
OV
DD
1.575V
COMMOI MODE
BꢀAS VOLTAGE
ꢀITERIAL ADC
REFEREICE
GEIERATOR
V
0.5V TO ±.6V
0
CM
1μF
–10
–20
2.2μF
OF
CLKOUT
D15
–±0
–40
–50
–60
–70
–80
+
AꢀI
+
16-BꢀT
PꢀPELꢀIED
ADC CORE
OUTPUT
DRꢀVERS
CORRECTꢀOI
LOGꢀC AID
SHꢀFT REGꢀSTER
CMOS
OR
LVDS
AIALOG
ꢀIPUT
S/H
AMP
•
•
•
–
–
AꢀI
D0
–90
OGID
–100
–110
–120
–1±0
CLOCK/DUTY
CYCLE
±.±V
1μF
V
DD
COITROL
1μF
1μF
GID
22165 TA01
0
10
20
±0
40
+
–
EIC
EIC
SHDI DꢀTH MODE LVDS RAID
ADC COITROL ꢀIPUTS
FREQUEICY (MHz)
22165 TA01b
22165f
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