Datasheet > LTC2175-14

LTC2175-14

更新时间： 2023-12-20 18:44:11

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
34页	852K
描述
14 位、125Msps 低功率四通道 ADC

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中文翻译

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LTC2175-14 数据手册

LTC2175-14/

LTC2174-14/LTC2173-14

TiMing characTerisTics ^Thel denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at T_A= 25°C. (Note 5)

SYMBOL PARAMETER

SPI Port Timing (Note 8)

CONDITIONS

MIN

TYP

MAX

UNITS

SCK Period

Write Mode

Readback Mode, C

= 2k

250

SCK

= 20pF, R

SDO

PULLUP

CS to SCK Setup Time

SCK to CS Setup Time

SDI Setup Time

SDI Hold Time

SCK Falling to SDO Valid

Readback Mode, C

= 2k

= 20pF, R

125

SDO

PULLUP

Note 7: Offset error is the offset voltage measured from –0.5 LSB when

the output code flickers between 00 0000 0000 0000 and 11 1111 1111

1111 in 2’s complement output mode.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 8: Guaranteed by design, not subject to test.

Note 2: All voltage values are with respect to GND with GND and OGND

shorted (unless otherwise noted).

Note 9: V = OV = 1.8V, f

(LTC2174), or 80MHz (LTC2173), 2-lane output mode, ENC = single-

ended 1.8V square wave, ENC = 0V, input range = 2V with differential

= 125MHz (LTC2175), 105MHz

SAMPLE

–

Note 3: When these pin voltages are taken below GND or above V , they

P-P

drive, unless otherwise noted. The supply current and power dissipation

specifications are totals for the entire chip, not per channel.

will be clamped by internal diodes. This product can handle input currents

of greater than 100mA below GND or above V without latchup.

Note 10: Recommended operating conditions.

Note 4: When these pin voltages are taken below GND they will be

clamped by internal diodes. When these pin voltages are taken above V

they will not be clamped by internal diodes. This product can handle input

currents of greater than 100mA below GND without latchup.

Note 11: The maximum sampling frequency depends on the speed grade

of the part and also which serialization mode is used. The maximum serial

data rate is 1000Mbps so t

must be greater than or equal to 1ns.

SER

Note 5: V = OV = 1.8V, f

= 125MHz (LTC2175), 105MHz

SAMPLE

Note 12: Near-channel crosstalk refers to Ch. 1 to Ch.2, and Ch.3 to Ch.4.

Far-channel crosstalk refers to Ch.1 to Ch.3, Ch.1 to Ch.4, Ch.2 to Ch.3, and

Ch.2 to Ch.4.

(LTC2174), or 80MHz (LTC2173), 2-lane output mode, differential ENC /

–

ENC = 2V sine wave, input range = 2V with differential drive, unless

P-P

otherwise noted.

Note 6: Integral nonlinearity is defined as the deviation of a code from a

best fit straight line to the transfer curve. The deviation is measured from

the center of the quantization band.

21754314fa

1...4 5 678 9 10...34

中文翻译

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与LTC2175-14相关器件

型号	品牌	获取价格	描述	数据表
LTC2175-14_15	Linear	获取价格	14-Bit, 125Msps/105Msps/ 80Msps Low Power Quad ADCs
LTC2175CUKG-12#PBF	Linear	获取价格	LTC2175-12 - 12-Bit, 125Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Rang
LTC2175CUKG-14	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Quad ADCs
LTC2175CUKG-14#PBF	Linear	获取价格	LTC2175-14 - 14-Bit, 125Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Rang
LTC2175CUKG-14#TRPBF	Linear	获取价格	LTC2175-14 - 14-Bit, 125Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Rang
LTC2175CUKG-14PBF	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Quad ADCs
LTC2175CUKG-14TRPBF	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Quad ADCs
LTC2175IUKG-12#PBF	Linear	获取价格	LTC2175-12 - 12-Bit, 125Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Rang
LTC2175IUKG-14	Linear	获取价格	14-Bit, 125Msps/105Msps/80Msps Low Power Quad ADCs
LTC2175IUKG-14#PBF	Linear	获取价格	LTC2175-14 - 14-Bit, 125Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Rang

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