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LTC2151CUJ-14#PBF PDF预览

LTC2151CUJ-14#PBF

更新时间: 2024-02-01 02:12:25
品牌 Logo 应用领域
凌特 - Linear 转换器
页数 文件大小 规格书
32页 1081K
描述
LTC2151-14 - Single 14-Bit 210Msps ADCs; Package: QFN; Pins: 40; Temperature Range: 0°C to 70°C

LTC2151CUJ-14#PBF 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:QFN包装说明:HVQCCN, LCC40,.24SQ,20
针数:40Reach Compliance Code:compliant
ECCN代码:3A991.C.3HTS代码:8542.39.00.01
风险等级:4.46最大模拟输入电压:1.5 V
最小模拟输入电压:-1.5 V最长转换时间:0.0047 µs
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-PQCC-N40
JESD-609代码:e3长度:6 mm
最大线性误差 (EL):0.0311%湿度敏感等级:1
模拟输入通道数量:1位数:14
功能数量:1端子数量:40
最高工作温度:70 °C最低工作温度:
输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式:PARALLEL, WORD
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装等效代码:LCC40,.24SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.8 V认证状态:Not Qualified
采样速率:210 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:0.8 mm子类别:Analog to Digital Converters
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6 mm
Base Number Matches:1

LTC2151CUJ-14#PBF 数据手册

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LTC2152-14/  
LTC2151-14/LTC2150-14  
14-Bit 250Msps/  
210Msps/170Msps ADCs  
FEATURES  
DESCRIPTION  
n
70dB SNR  
TheLTC®2152-14/LTC2151-14/LTC2150-14are250Msps/  
210Msps/170Msps 14-bit A/D converters designed for  
digitizing high frequency, wide dynamic range signals.  
They are perfect for demanding communications applica-  
tions with AC performance that includes 70dB SNR and  
90dB spurious free dynamic range (SFDR). The 1.25GHz  
input bandwidth allows the ADC to undersample high  
frequencies with good performance. The latency is only  
six clock cycles.  
n
90dB SFDR  
Low Power: 356mW/338mW/313mW Total  
Single 1.8V Supply  
DDR LVDS Outputs  
n
n
n
n
n
n
n
n
n
n
Easy-to-Drive 1.5V Input Range  
P-P  
1.25GHz Full Power Bandwidth S/H  
Optional Clock Duty Cycle Stabilizer  
Low Power Sleep and Nap Modes  
Serial SPI Port for Configuration  
Pin Compatible 12-Bit Versions  
40-Pin (6mm × 6mm) QFN Package  
DCspecsinclude 0.85LSBINL(typ), 0.25LSBDNL(typ)  
and no missing codes over temperature. The transition  
noise is 1.82LSB  
.
RMS  
The digital outputs are double-data rate (DDR) LVDS.  
APPLICATIONS  
+
n
n
n
n
n
n
The ENC and ENC inputs can be driven differentially with  
asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional  
clock duty cycle stabilizer allows high performance at full  
speed for a wide range of clock duty cycles.  
Communications  
Cellular Basestations  
Software Defined Radios  
Medical Imaging  
High Definition Video  
Testing and Measurement Instruments  
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
TYPICAL APPLICATION  
LTC2152-14: 32K Point FFT,  
fIN = 15MHz, –1dBFS, 250Msps  
V
DD  
0
OV  
DD  
–20  
–40  
D12_13  
14-BIT  
PIPELINED  
ADC  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
DDR  
LVDS  
S/H  
D0_1  
–60  
–80  
OGND  
CLOCK/DUTY  
CYCLE  
CONTROL  
CLOCK  
–100  
–120  
21521014 TA01a  
0
40  
60  
80  
100 120  
20  
FREQUENCY (MHz)  
21521014 TA01b  
21521014fa  
1
For more information www.linear.com/LTC2152-14  

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