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LTC2156-12 PDF预览

LTC2156-12

更新时间: 2022-11-16 11:14:46
品牌 Logo 应用领域
凌特 - Linear /
页数 文件大小 规格书
34页 634K
描述
Dual 14-Bit 250Msps

LTC2156-12 数据手册

 浏览型号LTC2156-12的Datasheet PDF文件第2页浏览型号LTC2156-12的Datasheet PDF文件第3页浏览型号LTC2156-12的Datasheet PDF文件第4页浏览型号LTC2156-12的Datasheet PDF文件第5页浏览型号LTC2156-12的Datasheet PDF文件第6页浏览型号LTC2156-12的Datasheet PDF文件第7页 
LTC2157-14/  
LTC2156-14/LTC2155-14  
Dual 14-Bit 250Msps/  
210Msps/170Msps ADCs  
FEATURES  
DESCRIPTION  
The LTC®2157-14/LTC2156-14/LTC2155-14 are 2-channel  
simultaneous sampling 250Msps/210Msps/170Msps  
14-bit A/D converters designed for digitizing high fre-  
quency, wide dynamic range signals. They are perfect  
for demanding communications applications with AC  
performance that includes 70dB SNR and 90dB spurious  
freedynamicrange(SFDR). The1.25GHzinputbandwidth  
allows the ADC to undersample high frequencies with  
good performance. The latency is only five clock cycles.  
n
70dB SNR  
n
90dB SFDR  
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Low Power: 650mW/616mW/567mW Total  
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Single 1.8V Supply  
DDR LVDS Outputs  
Easy-to-Drive 1.5V Input Range  
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P-P  
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n
n
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1.25GHz Full Power Bandwidth S/H  
Optional Clock Duty Cycle Stabilizer  
Low Power Sleep and Nap Modes  
Serial SPI Port for Configuration  
Pin-Compatible 12-Bit Versions  
64-Pin (9mm × 9mm) QFN Package  
DCspecsinclude 0.85LSBINL(typ), 0.25LSBDNL(typ)  
and no missing codes over temperature. The transition  
noise is 1.82LSB  
.
RMS  
APPLICATIONS  
The digital outputs are double data rate (DDR) LVDS.  
+
n
The ENC and ENC inputs can be driven differentially with  
asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional  
clock duty cycle stabilizer allows high performance at full  
speed for a wide range of clock duty cycles.  
Communications  
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Cellular Basestations  
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Software Defined Radios  
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Medical Imaging  
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear  
Technology Corporation. All other trademarks are the property of their respective owners.  
High Definition Video  
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Testing and Measurement Instruments  
TYPICAL APPLICATION  
LTC2157-14 32K Point FFT,  
fIN = 15MHz, –1dBFS, 250Msps  
V
DD  
OV  
DD  
CHANNEL A  
0
–20  
DA12_13  
ꢀꢀꢀꢀt  
ꢀꢀꢀꢀt  
ꢀꢀꢀꢀt  
DA0_1  
14-BIT  
PIPELINED  
ADC CORE  
CORRECTION  
LOGIC  
DDR  
LVDS  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
S/H  
–40  
–60  
OGND  
CLOCK/DUTY  
CYCLE  
CONTROL  
CLOCK  
–80  
OV  
DD  
CHANNEL B  
–100  
–120  
DB12_13  
ꢀꢀꢀꢀt  
ꢀꢀꢀꢀt  
ꢀꢀꢀꢀt  
DB0_1  
14-BIT  
PIPELINED  
ADC CORE  
CORRECTION  
LOGIC  
ANALOG  
INPUT  
OUTPUT  
DRIVERS  
DDR  
LVDS  
S/H  
0
40  
60  
80  
100 120  
20  
FREQUENCY (MHz)  
21576514 TA01b  
GND  
21576514 TA01  
OGND  
21576514fa  
1

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