LTC2152-12/
LTC2151-12/LTC2150-12
Single 12-Bit 250Msps/
210Msps/170Msps ADCs
FEATURES
DESCRIPTION
The LTC®2152-12/LTC2151-12/LTC2150-12 are a family
of 250Msps/210Msps/170Msps 12-bit A/D converters
designedfordigitizinghighfrequency,widedynamicrange
signals. They are perfect for demanding communications
applications with AC performance that includes 68.5dB
SNR and 90dB spurious free dynamic range (SFDR). The
1.25GHz input bandwidth allows the ADC to undersample
highinputfrequencieswithgoodperformance.Thelatency
is only six clock cycles.
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68.5dB SNR
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90dB SFDR
Low Power: 347mW/333mW/306mW Total
Single 1.8V Supply
DDR LVDS Outputs
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Easy-to-Drive 1.5V Input Range
P-P
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1.25GHz Full Power Bandwidth S/H
Optional Clock Duty Cycle Stabilizer
Low Power Sleep and Nap Modes
Serial SPI Port for Configuration
Pin-Compatible 14-Bit Versions
40-Lead (6mm × 6mm) QFN Package
DCspecsinclude 0.26LSBINL(typ), 0.16LSBDNL(typ)
and no missing codes over temperature. The transition
noise is 0.54LSB
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RMS
The digital outputs are double-data rate (DDR) LVDS.
APPLICATIONS
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–
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The ENC and ENC inputs can be driven differentially with
asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional
clock duty cycle stabilizer allows high performance at full
speed for a wide range of clock duty cycles.
Communications
Cellular Basestations
Software Defined Radios
Medical Imaging
High Definition Video
Testing and Measurement Instruments
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
LTC2152-12: 32K Point 2-Tone FFT,
fIN = 71MHz and 69MHz, 250Msps
V
DD
OV
0
–20
DD
D10_11
12-BIT
PIPELINED
ADC
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CORRECTION
LOGIC
ANALOG
INPUT
OUTPUT
DRIVERS
DDR
LVDS
S/H
•
•
–40
D0_1
–60
OGND
CLOCK/DUTY
CYCLE
CONTROL
–80
CLOCK
–100
–120
21521012 TA01a
GND
0
40
60
80
100 120
20
FREQUENCY (MHz)
21521012 TA01b
21521012fa
1
For more information www.linear.com/LTC2152-12