Electrical Specifications Subject to Change
LTC2152-14/
LTC2151-14/LTC2150-14
14-Bit 250Msps/
210Msps/170Msps ADCs
FEATURES
DESCRIPTION
TheLTC®2152-14/LTC2151-14/LTC2150-14are250Msps/
210Msps/170Msps 14-bit A/D converters designed for
digitizinghighfrequency,widedynamicrangesignals.They
are perfect for demanding communications applications
with AC performance that includes 70dB SNR and 90dB
spurious free dynamic range (SFDR). The latency is only
five clock cycles.
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70dB SNR
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90dB SFDR
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Low Power: 338mW/316mW/290mW Total
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Single 1.8V Supply
DDR LVDS Outputs
Easy-to-Drive 1.5V Input Range
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P-P
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1.25GHz Full Power Bandwidth S/H
Optional Clock Duty Cycle Stabilizer
Low Power Sleep and Nap Modes
Serial SPI Port for Configuration
Pin Compatible with 12-Bit Versions
40-Pin (6mm × 6mm) QFN Package
DCspecsinclude 0.85LSBINL(typ), 0.25LSBDNL(typ)
and no missing codes over temperature. The transition
noise is 1.82LSB
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RMS
The digital outputs are Double-Data Rate (DDR) LVDS.
+
–
The ENC and ENC inputs can be driven differentially with
asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional
clock duty cycle stabilizer allows high performance at full
speed for a wide range of clock duty cycles.
APPLICATIONS
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Communications
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Cellular Basestations
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Software Defined Radios
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
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Medical Imaging
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High Definition Video
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Testing and Measurement Instruments
TYPICAL APPLICATION
32K Point FFT,
fIN = 15MHz, –1dBFS, 250Msps
V
DD
0
OV
DD
–20
–40
D12_13
14-BIT
PIPELINED
ADC
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CORRECTION
LOGIC
ANALOG
INPUT
OUTPUT
DRIVERS
DDR
LVDS
S/H
•
•
D0_1
–60
–80
OGND
CLOCK/DUTY
CYCLE
CONTROL
CLOCK
–100
–120
21521014 TA01a
0
40
60
80
100 120
20
FREQUENCY (MHz)
21521014 TA01b
21521014p
1